
A fabrication arrangement using plural LSI chips to make a bit stream detection system requiring a programmable logic array which is too large to fit on a single LSI chip. Due to the small number of input/output pins available on any LSI chip, the fabrication arrangement divides among the chips an input shift register, the array, and array input latches. Each LSI chip also has time-multiplexed array outputs and time-multiplexed feedback inputs that minimize the pins and enable interconnection am...











