An interface unit for connecting a transmitting unit to a receiving unit, the transmitting being capable of transmitting data at a speed greater than the processing speed of the receiving unit. The interface includes a serially connected multistage register which receives input data from the transmitting unit at its input stage and reads out data stored in its output stage to the receiving unit. It also includes a control circuit and a counter storing a count corresponding to the quantity of dat...

A portable electrocardiogram storing apparatus has an electrocardiogram amplifier, an A/D converter for sampling the amplifier output and converting it into a digital signal, a patient actuatable switch, a plurality of electrocardiogram memories, and means for selecting one of the memories for storing the digital signal when the switch is actuated. A time memory is also provided for storing a time when the apparatus is set, and a timer measures a lapse time after the setting. A selected electroc...

A control apparatus for transferring characters from a font memory to a printer including a microprocessor which controls input and output of characters to and from a strip memory, tracks the status of input/output operations to insure overwriting of the memory does not occur, and supplies a minimal amount of control information to hardwired circuitry from which character building processes are autonomously controlled.

A controller for interfacing a single-chip microcomputer with external dynamic random-access memory, includes a subcircuit for generating a column-address strobe at a time after a row-address strobe is generated, and also includes a multiplexing subcircuit for providing the proper 8-bit portion of a 16-bit address output from the microprocessor to the 8-bit dynamic memory inputs, prior to receipt of the associated row-address or column-address strobe. The microprocessor utilizes the strobe-gener...

An interface is connected between an OCIA type port and a mailing system peripheral, such as a weighing cell. The interface comprises an input data circuit, operatively connected to a serial data input line and to an associated input clock line, for receiving serial data input words comprising 8 serial data bits and an end-of-message (EOM) bit. The input circuit converts the serial input words into parallel form and transfers them to a programmable interface controller. The interface also includ...

In providing digital filters for remote control receivers, in particular, for audio-frequency centralized ripple control receivers in an economic manner, it is advantageous to be able to use a processor unit with as low a bit number as possible (for example, an 8-bit microcomputer). In a conventional design of a filter according to the prior art, the dynamic range which is provided with an 8-bit processor element is insufficient in ensuring a perfect operation of the filter when a quality factor...

A sign generation system having a plurality of carry save adders. When adding a sum and a carry generated by a carry save adder in a next stage carry save adder, a full sum of two-bit sign fields adjacent to data fields of the sum and the carry is calculated. The resulting two-bit sign is combined with a constant to generate an exact sign, decreasing number of transferred sign bits.

The disclosure relates to an improvement in data processing systems involving a host processor and a remote printer which prints alphanumeric characters from data communicated from the host to the printer. The improvement provides the provision of an intermediate processor having an interactive display terminal. There are means in this intermediate processor for controlling the setup of repetitive format parameters of documents containing the alphanumeric characters printed by the printer. In ad...

A data collection terminal includes a microprocessor, a memory and a number of devices coupled to a system bus. Included among the devices is a communication controller. An interrupt controller processes the device interrupt requests by sending out a vector address to the microprocessor. This enables the microprocessor to branch to a subroutine to process the interrupt. Apparatus is provided to enable the communication controller to generate vector addresses when it sends an interrupt request to...

A pulse duration modulated (PDM) signal is generated from a periodic digitized signal which may be produced by sampling an analog signal of frequency F.sub.s and using a digitizing frequency F where F>>F.sub.s. Linearity of the analog signal between sampling points is assumed. A computer solution of the intercept of the assumed straight line between each pair of successive sample values of the digitized signal and a reference triangular waveform of frequency F/2 provides the time interval ...