An improved complementary-type clock generator minimizes the time difference between a normal clock signal and an inverted clock signal. The clock generator includes an inverting unit for outputting Vcc-Vtn and Vss+Vtp level voltage by pulling up and pulling down the source voltage and ground voltage in accordance with an externally applied clock signal, and a first buffer for outputting Vcc-Vtn and Vss+Vtp level voltages by pulling up and pulling down the source voltage and ground voltage in ac...

The invention is embodied in a receiver and a method for responding to an input signal. The input signal is received in a first stage of the receiver, which generates a first stage output signal responsive thereto. If the input signal does not exceed a first level, the first stage output signal is generated by an overvoltage element. That is, for this case, the overvoltage element passes the input signal through to the first stage output, and the first stage output voltage is not increased by a ...

A quadrant detector circuit (400) has a comparator (442) having a pair of inputs (438, 440). A first (438) of the pair of inputs (438, 440) is coupled to an in-phase signal (434) and a second (440) of the pair of inputs (438, 440) is coupled to a quadrature phase signal (436). A sample counter (448) has a reset (446) coupled to an output (444) of the comparator (442). A controllable switch (456) has a selection input (454) coupled to an output (452) of the sample counter (448). The controllable ...

A comparator with a built-in offset is disclosed. The comparator includes a bias current circuit, a differential input stage with the built-in offset, and a hysteresis circuit. The built-in offset is generated by using a resistor in the differential input stage of the comparator such that the resistor is driven by the bias current as well as the current generated by the hysteresis circuit. Additionally, a reset circuit which uses the comparator with the built-in offset is described. The reset ci...

A micro-relay replaces electromechanical and solid-state opto-isolated relays in a computer network. The micro relay is an integrated circuit containing several bus switches in parallel. Each bus switch can make or break a connection. The bus switch is an n-channel MOS transistor with the source and drain connected to different network busses. A bus enable input causes the connection to be made or broken. The bus enable input is separately buffered for each gate of each MOS transistor to prevent...

A current mirror circuit includes a current input terminal; a first FET and a second FET, each having a gate terminal, a drain terminal, and a source terminal, the gate terminal of the first FET being connected to the gate terminal of the second FET; a third FET having a source terminal connected to the drain terminal of the first FET, and a drain terminal and a gate terminal connected to each other and to the current input terminal; and a fourth FET having a source terminal connected to the dra...

A driver circuit that is powered by a power supply voltage has an output terminal, and includes a pull-up transistor for pulling the output terminal up toward the power supply voltage. A voltage divider that is connected across the power supply voltage has a tap connected in circuit to an input of the pull-up transistor and includes variable resistance elements whose resistance varies together with a threshold voltage of the pull-up transistor for limiting a voltage at the output terminal to wit...

A protection circuit (1) for input comprises two transistors (11, 12) connected in series between a first voltage supply (V.sub.cc) and a second voltage supply (GND), and an intermediate junction point is used as an input terminal and an output terminal. When a surge voltage is applied to the input terminal, since terminals (51, 53) of the two transistors (11, 12) are connected to predetermined junction points in such a way that the transistors can operate as bipolar transistors or cause punch t...

A current source providing a voltage-controlled variable-current reference is described which employs a conventional current mirror to supply a current to a diode-connected transistor, and to a plurality of controllable current paths, wherein the controllable current paths are controlled by voltages from a voltage sensing circuit so that predetermined amounts of current are drawn away from the diode-connected transistor as function of a controlled voltage, so that the diode-connected transistor ...

A fast data transmission circuit for a semiconductor memory minimizes voltage variations of a data transmission line without the use of a separate data transmission voltage. The data transmission circuit includes a pair of input nodes, a data transmission line pair, a pair of sensing nodes, a pair of output nodes, and a control electrode. Prior to data transmission, the output nodes are pulled up to a high voltage state, the data transmission line pair is pulled down to a low voltage state, and ...