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Results for FIELD_OF_SEARCH: 257/e27.132
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An electro-optical device includes first switching elements which are correspondingly provided at intersections of a plurality of scanning lines and a plurality of data lines in a display region, at least three metal layers which are provided in the display region, a wiring line portion which is provided in an adjacent region of the display region and supplies signals to second switching elements through signal lines formed of at least two metal layers of the three metal layers, and an electroma...
An N-channel TFT and OLED display apparatus and electronic device using the same are disclosed. The N-channel TFT comprises a a substrate; an active layer on the substrate, wherein the active layer comprises an N type source region and an N type drain region; a gate dielectric layer on the active layer; and a gate region on the gate dielectric layer. At least a part of the highly-doped source region is located under the gate region, and at least a part of the lightly-doped drain region is locate...
A resin material having a small relative dielectric constant is used as a layer insulation film 114. The resin material has a flat surface. A black matrix or masking film for thin film transistors is formed thereon using a metal material. Such a configuration prevents the problem of a capacity generated between the masking film and a thin film transistor.
A liquid crystal display panel and a fabricating method thereof for reducing the number of data lines and the capacitance of a parasitic capacitor between pixel electrodes are disclosed. A first switching part has at least two thin film transistors for applying a first pixel signal that is supplied to a first data line to a first pixel electrode under control of the second control line and the gate line. A second switching part has at least two thin film transistors for applying a second pixel s...
An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag, and improves blue response in imaging devices.
A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolated the...
The invention also relates to an apparatus and method for selectively providing a silicide coating over the transistor gates of a CMOS imager to improve the speed of the transistor gates. The method further includes an apparatus and method for forming a self aligned photo shield over the CMOS imager.
A radiation detecting apparatus according to the present invention includes: pixels including switching elements arranged on an insulating substrate and conversion elements arranged on the switching elements to convert a radiation into electric carriers, the switching elements and the conversion elements are connected with each other, the pixels two-dimensionally arranged on the insulating substrate in a matrix; gate wiring commonly connected with a plurality of switching elements arranged in a ...
A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plura...
A method of forming a pixel sensor cell structure. The method of forming the pixel cell comprises forming a doped layer adjacent to a first side of a transfer gate structure for coupling a collection well region and a channel region. Potential barrier interference to charge transfer caused by a pinning layer is reduced.
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