A carbon nanotube sensor and a method of producing the carbon nanotube sensor are disclosed. The sensor detects small particles and molecules. The sensor includes a gate, a source and a drain positioned on the gate, and a carbon nanotube grown from a catalytic material and extending from one of the source and the drain. The method includes the step of functionalizing an end of the carbon nanotube with a receptor. As such, the carbon nanotube is receptive to the small particles and molecules. The...

Nanostructures and methods of making nanostructures having self-assembled nanodot arrays wherein nanodots are self-assembled in a matrix material due to the free energies of the nanodot material and/or differences in the Gibb's free energy of the nanodot materials and matrix materials.

A Ti film is pattern-formed on a desired portion on a silicon substrate, and a Co film is formed on the substrate so as to cover the Ti film. CNTs are formed only on a portion, under which the Ti film is formed, of the surface of the Co film at approximately 600.degree. C. by a thermal CVD method. The length of the CNT can be controlled by adjusting the thickness of the Ti film.

A nonvolatile memory device includes a substrate having a source region; a nanotube array including a plurality of nanotube columns that are vertically grown on the substrate such that a first end of the nanotube array is in contact with the source region, the nanotube array functioning as an electron transport channel; a memory cell formed around an outer side surface of the nanotube array; a control gate formed around an outer side surface of the memory cell; and a drain region in contact with...

One or more semiconducting or conducting regions of a device such as a transistor may comprise molecular materials such as nanotubes or similar materials. Regions of a conductive alignment pattern used to align the nanotubes may be proximate to one or more ends of the nanotube. Additionally, a contact region may be proximate to each end of the nanotube to provide electrical contact to the nanotube. Nanotubes or the like may be in communication with device interconnection regions on a device subs...

The invention provides a carbon nanotube field effect transistor including a nanotube having a length suspended between source and drain electrodes. A gate dielectric material coaxially coats the suspended nanotube length and at least a portion of the source and drain electrodes. A gate metal layer coaxially coats the gate dielectric material along the suspended nanotube length and overlaps a portion of the source and drain electrodes, and is separated from those electrode portions by the gate d...

Nanotube on gate FET structures and applications of such, including n.sup.2 crossbars requiring only 2n control lines. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and a channel region of a second semiconductor type of material disposed between the source and drain region. A gate structure is made of at least one of semiconductive or conductive material and is disposed over an insulator over the channel region. A control g...

The present invention includes a method for creating a reconfigurable nanometer-scale electronic network. One embodiment of the invention is made up of the following steps. The first step entails depositing nanometer-scale electrically conducting islands on an insulating substrate. The next step entails engineering electrically conducting molecules to preferentially attach to the nanometer-scale electrically conducting islands, forming a semi-regular array of current-conducting elements. The nex...

A memory array comprising nanoscale wires is disclosed. The nanoscale wires are addressed by means of controllable regions axially and/or radially distributed along the nanoscale wires. In a one-dimensional embodiment, memory locations are defined by crossing points between nanoscale wires and microscale wires. In a two-dimensional embodiment, memory locations are defined by crossing points between perpendicular nanoscale wires. In a three-dimensional embodiment, memory locations are defined by ...

Carbon nanotube devices and methods for fabricating these devices, wherein in one embodiment, the fabrication process consists of the following process steps: (1) generation of a template, (2) catalyst deposition, and (3) nanotube synthesis within the template. In another embodiment, a carbon nanotube transistor comprises a carbon nanotube having two or more defects, wherein the defects divide the carbon nanotube into three regions having differing conductivities. The defects may be introduced b...