A bias current to be supplied to an amplification circuit 60 is drawn out of a collector of a transistor Q11 of a bias circuit 10. The drawn-out bias current is input to a base of a transistor Q13 via an attenuation filter F2 and is output from an emitter of the transistor Q13 in the state where the voltage thereof is reduced by a level corresponding to Vbe. The attenuation filter F2 is conducted in a DC manner, and attenuates a component of a frequency fH(=2ft-fr) defined by a transmission freq...

The present invention has for its object to provide a bias circuit capable of handling multiple frequency bands, which has a low number of parts and can be miniaturized. As a solving means therefor, the bias circuit of the present invention comprises: a first reactance means 2 and a second reactance means 5, one end each of which is connected to a bias point 210 to which an alternating current signal is supplied; a capacitive means 3 connecting the other end of first reactance means 2; and a dir...

An operational amplifier amplifies a signal received through its input terminal connected directly to a piezoelectric device. A bias voltage generating section includes a voltage divider between the power supply terminal and the ground terminal. The drain and source of a p-channel MOSFET are connected to the input terminal of the operational amplifier and the ground terminal. Since the voltage divider applies a bias voltage to the gate and the backgate, the p-channel MOSFET maintains the OFF sta...

An FET gate bias circuit having a Schottky barrier gate incorporated therein is provided which can prevent gate voltage variations and thus provide a high-performance, high-reliability GaAs FET amplifier. The FET gate bias circuit includes a PNP transistor having a collector connected to a negative power supply, an NPN transistor having a collector thereof grounded and an emitter connected to the emitter of the PNP transistor, a Schottky barrier gate FET having a source grounded and a gate conne...

A common emitter amplifier having a resistor in series with its emitter and a resistor in series with its collector is temperature stabilized by providing a current source in parallel with the resistor in series with the collector. The current source provides additional emitter current to the transistor to decrease the transistors internal AC emitter resistance. Cascoded transistors are also used to improve the performance of the amplifier.

A microwave power amplifier having application in multiple beam phased antenna array systems including a biasing means connection to the base of a microwave transistor being responsive to radio frequency signals applied to the amplifier to automatically adjust the transistor bias level to maintain constant amplifier gain. The biasing means includes two voltage regulators with their outputs capacitively coupled via a fixed resistor having a value determined by the characteristics of the transisto...

A selection unit, which is provided between an input matching unit and a high frequency amplification unit, is used to select a specific high frequency band to be amplified by the high frequency amplification unit from high frequency signals input from an input terminal. Further, an attenuation unit, which is provided between an input of the high frequency amplification unit and ground, is used to attenuate the input high frequency signals except for the specific high frequency band. Therefore, ...

An emitter follower circuit applies to an input terminal of a second amplifying device a voltage according to a reference voltage applied to a reference terminal. First and second resistors are connected in series between the reference terminal and an input terminal of a first amplifying device. The collector of a first transistor is connected to the reference terminal and a control voltage is applied to the base of the first transistor. A third resistor is connected between the emitter of the f...

An embodiment of a circuit for biasing a transistor such as an amplifier transistor includes reference and bias nodes, and includes buffer, reference, and feedback stages. The reference node receives a reference current, and the bias node, which is for coupling to the transistor, carries a bias signal. The buffer stage buffers the reference node from the bias node. The reference stage generates the bias signal from the reference current, and the bias signal causes the transistor to conduct a bia...

Embodiments of apparatuses, articles, methods, and systems for a bias network providing a stable transient response are generally described herein. Other embodiments may be described and claimed.