A high-speed sampling system and an analog to digital converter are disclosed. One embodiment of a method of sampling a signal includes receiving an analog signal and generating first samples at a rate of Fs, and generating second sub-samples from the first samples at a rate of Fs/N and having a relative phase of approximately (360/N)*(i-1) degrees, where i varies from 1 to N. In a first embodiment, at most two second sub-samplers are tracking the output of the first sampler at any point in time...

A system for reducing noise coupling in a mixed-signal IC includes a digital clock, an analog clock, and gating signal generator, and a gating circuit. The gating circuit receives a digital clock signal and the gating pulse to generate a gated digital clock signal having no pulses at a sampling edge of the analog clock signal to provide a "quiet time" for analog sampling.

The present invention is intended to realize an analog signal sampling circuit constructed with field-effect transistors wherein errors caused by parasitic capacitance or gate conductance in a switch device is reduced. The sampling circuit of the invention comprises an inverting amplifier, a capacitor, a first switch for selecting a reference voltage Vref or a target signal Vin for input to the capacitor, and a second switch for opening or closing the connection between the input and output of t...

A buffer for the input to an A/D converter operates in two stages. During the first stage, the input is not provided directly to the A/D converter; rather, a buffered output which corresponds to the input is provided to the A/D converter so as to pre-charge the sampling capacitor of the A/D converter to a value that is substantially close to the input. In the second stage, the input is provided directly to the A/D converter, which charges its sampling capacitor to the value of the input. Because...

Provided is an apparatus and method to convert an analog signal into a digital signal, more particularly, an apparatus and method for converting an analog signal into a digital signal, the apparatus and method to perform a sampling operation by taking an average value of an analog signal for a predetermined sample period as a sample value and converting the analog signal into a digital signal using the sample value. The apparatus includes a signal input unit to which an analog signal is input; a...

For signal processing such as in an image sensor, a CDS (correlated double sampling) unit generates a first CDS signal from a first set of input signals at a predetermined node. In addition, a conversion unit converts a second CDS signal into a respective converted signal concurrently as the CDS unit generates the fist CDS signal. The second CDS signal is determined from a second set of input signals previously generated at the predetermined node.

A method and apparatus for reducing switching noise in a system-on-chip (SoC) integrated circuit including an analog to digital converter (ADC) provides for reduced noise in the ADC conversions. Sampling circuits of the ADC are operated by sampling clock signals and digital circuits and other noise-generating circuits such as power converters, are operated by digital circuit clock signals. Both sets of clock signals are derived from the same master clock by a clock generator circuit, but an offs...

A system having a signal converter device, and a method for operating a system having a signal converter device is disclosed. One embodiment provides loading a capacitive device to a preparation voltage in a first operating phase, and loading the capacitive device to a measuring voltage in a second operating phase after the first operating phase.

This disclosure relates to techniques and architecture for summing, sampling, and converting signals associated with a capacitive feedforward filter using a quantizer.

Systems and methods are included for providing anti-aliasing in a sample-and-hold circuit. One embodiment of the present invention includes a method for sampling of an input signal for providing to an analog-to-digital converter. The method comprises generating a sample signal having a given frequency and a period that defines both a sample phase and a hold phase. The method also comprises sampling the input signal at both the sample phase and the hold phase. The method further comprises generat...