
An automatic speed control system is disclosed in which an error signal Ve, representing the speed error of the vehicle, is added to a ramp voltage, ramping between fixed values, to produce a control signal Vc. Two comparators compare Vc with upper and lower limits, respectively, so as to produce a pulse train on one of two lines depending on the sign of the error and having a mark-space ratio depending on the magnitude of the error. A circuit responds to the first pulse to occur in the pulse tr...











