A method for register management in a simulation environment including receiving an instruction from an instruction unit decode pipeline. An address generation interlock (AGI) function is executed in the simulation environment if the instruction is an AGI instruction. The executing an AGI function is responsive to a pool of registers controlled by a register manager and to the instruction. An early AGI function is executed in the simulation environment if the instruction is an early AGI instruct...

A method and system are provided by the present invention for developing functional software element that operates in an environment comprising a plurality of computer programs that are being simultaneously developed. A test facilitating computer program product is utilized to simulate the plurality of computer programs as seen by the functional software element. The functional software element has one or more internal software interfaces that interact with one or more simulated external softwar...

A method for providing verification for a simulation design, including obtaining the simulation design comprising a programming language interface system call, encoding a target of the programming language interface system call into the simulation design to obtain a first modified simulation design, modifying the programming language interface system call to reference the target in the first modified simulation design to obtain a second modified simulation design, and verifying the second modifi...

A performance prediction simulator gives effect to the resource contention among multiple resources in a simulated system by adjusting event durations appropriately. A resource topology tree defining the resource configuration of the system is input to the simulator. The simulator includes an evaluation engine that determines the amount of resource used during each simulation interval of the simulation and records the resource usage in a resource contention timeline, which can be displayed to a ...

Procedure summaries can be generated and used for multithreaded software. A set of actions for a software procedure can be identified as atomically modelable with respect to multithreaded execution of the software. Such actions can be considered a transaction and deemed to have occurred one after another without interruption by other threads. Thus, multithreaded execution of the software can be modeled to detect programming flaws. For example, reachability analysis can be used in concert with th...

An impedance simulator having the capability of simulating the operational mpedance characteristics of a whip antenna in open field throughout a given frequency range. The simulator includes a cylindrical chamber of conductive, non-magnetic material coated on the interior surface with a lossy ferrite material. Coaxially mounted on the interior of the chamber is a coaxial conductor having at one end thereof a coaxial connector. The other end of the coaxial conductor has the center conductor there...

A logical simulation device executes simulation, based on cycle, using level sort and compile methods. In order to realize the high speed of the entire system in a practically usable scale, the system comprises a lot of processors, each capable of performing an evaluation process of executing simulation using a logical block corresponding to one or more gates as an evaluation unit, and a communication process with the other processors. A plurality of processors constitute a processor group, and ...

According to a method of specifying a trace array for simulation of a digital design, one or more entities within a simulation model are specified with one or more statements in one or more hardware description language (HDL) files. In addition, a trace array for storing data generated through simulation of the simulation model is specified in one or more statements in the one or more HDL files. The HDL files may subsequently be processed to create a simulation model containing at least one desi...

Preconditioning for stochastic simulation of computer system performance is described. In an embodiment, methods taught herein include preconditioning a performance scenario that is simulated as part of a software deployment. The performance scenario specifies devices included as part of a hardware configuration supporting the software. The performance scenario can be modified based, at least in part, on the result of the preconditioning. Other methods taught herein include two complementary tec...

According to a method of simulation processing, an instrumented simulation executable model of a design is built by compiling one or more hardware description language (HDL) files specifying one or more design entities within the design and one or more instrumentation entities and instantiating instances of the one or more instrumentation entities within instances of the one or more design entities. Operation of the design is then simulated utilizing the instrumented simulation executable model....