A multi-processor computer system includes a memory bridge configured in a processor socket on a motherboard. The memory bridge module electrically connects a processor bus and a memory bus that connect to the processor socket. Thus, an adjacent processor is capable of accessing an unused memory by way of the processor bus, the memory bridge and the memory bus.

It is aimed at improving the efficiency of data transfer processing and the concurrent data processing on a central processing unit. A data transfer device can independently request a bus access right and output an address to a first bus (IBUS) and a second bus (PBUS). It is possible to solve the state of competing for the bus access right between both buses. While the bus access right of one bus is granted for reading or writing, the bus access right of the other bus can be released. When the d...

Methods and associated structure for providing broadcast of PCI bus transactions using device ID messaging (DIM) features of the PCI bus specifications. A vendor defined class of messages are defined using device ID messaging to provide broadcast of messages across PCI bus bridge devices to multiple PCI bus segments. One aspect hereof provides for using implicitly addressed device ID messaging such that bridge devices, compatible with the vendor defined message classes, will forward the message ...

A system and method for supporting multiple graphics processing units (GPUs) includes a first communication path coupled to a root complex device and a first connection point of a first GPU. A second communication path is coupled to the root complex device and a first set of switches. The first set of switches is configured to route communications between the root complex device to either a second connection point of the first GPU via a second set of switches or to a first connection point of a ...

A data transfer control system includes: a port control section which controls ports P1 and P2 respectively connected with an electronic instrument PC1 and an electronic instrument PC2; and a bus reset issue section which issues a bus reset. The port P2 is set to a disabled state, and then the bus reset is issued to cause the electronic instrument PC1 to acquire an access right. The port P2 is set to an enabled state after the bus reset has been issued and the electronic instrument PC1 has acqui...

In a data processing system, a plurality of modules connected to a system bus thereof are assigned with identifiers. When a source module initiates a split read access to another module, the source module sends an address of the access destination module and an identifier of the source module. When sending a response to the source module, the destination module returns response data and the identifier of the source module thereto. Checking the identifier from the destination module, the source m...

A bus controller and a control method are used in a computer system. In a bus controller, a bus controller main circuit issues a first signal to the central processing unit in response to a bus configuration cycle for indicating the presence of a first-level bus that the first group of components is coupled to. A virtual bridge device issues a second signal to the central processing unit in response to the bus configuration cycle for indicating the presence of a second-level bus that the second ...

A bridge accessible by a host processor can expand access over a first bus to a second bus. The first bus and the second bus are each adapted to separately connect to respective ones of a plurality of bus-compatible devices. Allowable ones of the devices include memory devices and input/output devices. The bridge has a link, together with a first and a second interface. The first interface is coupled between the first bus and the link. The second interface is coupled between the second bus and t...

A PCI-Express interconnect device is provided. The device comprises: first and second upstream ports; first and second downstream ports; and a management entity. The management entity is operable to logically partition the device such that the first upstream port is operable to communicate with the first downstream port and the second upstream port is operable to communicate with the second downstream port. In one example, the management device is additionally operable to migrate the first downs...

An expansion device for storage units is applicable to a data processing system such as a blade server, to allow the number of storage units connected with the expansion device to be adjusted or increased according to user requirements. The expansion device is provided with a first interface connected with the data processing system, and with at least one second interface connected with at least one storage unit. The expansion device further includes a transmitting unit and a switching module fo...