The present invention provides a method to test a protocol stack operable to be loaded to a wireless terminal. This involves the creation of simulation scripts from prior test case logs associated with a prior test case executed on a physical wireless terminal. When the prior test case is failed on a physical device, the simulation scripts are used to locate and correct errors in protocol stack. The simulation scripts are then stored within and retrieved from a library. These simulations scripts...

A communication interface for an in-circuit emulation system. The interface uses four pins between a virtual microcontroller (an FPGA emulating a microcontroller) and a real microcontroller under test. The bus is fast enough to allow the two devices to operate in synchronization. I/O reads, interrupt vector information and watchdog information is provided over the bus in a time fast enough to allow execution in lock step. Two data lines are provided, one is bi-directional and one is driven only ...

A power management system and circuit comprising instructions stored in computer memory for the prevention of simultaneous coupling of more than one power source to a device under test (DUT). Instructions stored in memory prevent the simultaneous application of power to the DUT from both the in circuit emulator power grid and an external power source. External power applied to the DUT results in at least one activity signal detected by the computer. If no activity signal appears, a fault conditi...

An emulation and debugging system that includes an in-circuit emulator couplable to a microcontroller. The in-circuit emulator is adapted to execute an event thread in lock-step with the microcontroller. Event information generated as a result of executing the event thread is sampled at selected points and the sampled event information is stored in memory. Trace information is also recorded at the selected points. The sampled event information and the recorded trace information are time-stamped....

A watchdog timer control using a gatekeeper in an In-Circuit Emulation system. The In-Circuit Emulation system has a microcontroller operating in lock-step synchronization with a virtual microcontroller. When a watchdog event occurs, the gatekeeper, forming a part of the virtual microcontroller, crowbars the reset line of the virtual microcontroller as well as the real microcontroller. This freezes the state of the virtual microcontroller so that debug operations can be carried out. The gatekeep...

A system implement simulation system's capable of facilitating integrated circuit designers to perform a complete integrated circuit testing with respect to a target peripheral device and demonstrate various functions and their sequence of operations without having to build the target device physically. The system allows, reliability and quality of an integrated circuit design to be increased, and production and testing costs can be reduced. The simulation system is capable of performing functio...

An integrated circuit device having a plurality of embedded processor/controllers and a parallel emulation trace port coupled thereto to provide trace data for debugging the integrated circuit device. A serializer macro is provided within the integrated circuit device to serialize the parallel data from the emulation trace port in order to provide trace data from the IC device in a serial data stream instead of a parallel data stream. A high speed differential serial driver is used to provide th...

The trace logic are separate from the clocks that operate the system logic. This allows the chip to be placed in a special mode where the functional logic is issued one clock. One frame of trace data is generated for each functional clock issued. A valid signal may be implemented changing state when new information is generated. The trace logic, whose clock is free running, detects the change in state in the valid signal. It then processes the trace information presented to it, exporting this in...

A method for testing floating point hardware in a processor while executing a computer program is disclosed. The method includes executing a first set of code of the computer program without employing the floating point hardware. The first set of code has a first floating point operation, thereby obtaining an emulated result. The method also includes executing the first floating point instruction utilizing the floating point hardware, thereby obtaining a hardware-generated result. The method als...

A microprocessor includes an externally accessible port and a serial communication bus connected to the port. An execution pipeline of the processor includes a pipeline satellite circuit coupling the pipeline to the bus. The satellite enables an external agent to provide an instruction directly to the pipeline via the serial bus. A dedicated register and register satellite circuit couple the register to the communication bus. The execution pipeline can access the dedicated register during execut...