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Results for INVENTOR: heidelberger philip
Showing 1 - 10 of 25
A Write/Load cache protocol is described which may be used for maintaining cache coherency and performing barrier synchronization in multiprocessor computer systems, and for cooperating with prefetch mechanisms to allow data to be loaded into a central processor unit's (CPU) cache (in both single and multiprocessor systems) in anticipation of future memory references. The new protocol is defined such that when a cache observes a Write/Load command (and associated data item) on a bus to which the...
An improved method, system, and a computer program storage device (e.g., including software embodied on a magnetic, electrical, optical, or other storage device) for management of compressed main memory allocation and utilization which can avoid system abends or inefficient operation that would otherwise result. One feature reduces (and ultimately eliminates) all unessential processing as the amount of available storage decreases to a point low enough to threaten a system abend. In another examp...
An improved method, system, and a computer program storage device for management of compressed main memory allocation and utilization. The present invention has features which advantageously avoid system abends or inefficient operation that would otherwise result. We identify 3 types of addresses associated with a page: a virtual address, a real address, and a physical address. The OS is responsible for converting virtual addresses to real addresses, and the memory controller is responsible for ...
A method (and computer system in which at least one software component thereof is restarted based on projection of resource exhaustion), for selecting the most suitable projection method from among a class of projection methods, includes providing M fitting modules which take measured symptom data associated with the system as input and produce M scores, wherein M is an integer, selecting the fitting module producing the best score, and from the selected module, producing a prediction of the res...
A computer implemented method prices derivative securities (for example, options) by selecting an importance sampling (IS) distribution and combining the chosen IS distribution with stratified sampling. The process consists of the steps of choosing an importance sampling distribution and combining the chosen importance sampling with stratification or Quasi-Monte Carlo (QMC) simulation. In the first step, an importance sampling distribution is chosen. In the second step, the chosen importance sam...
A computing system includes a storage server having a memory organization that includes a compressed memory device for storing sectors, each sector having a sector data portion and associated header and trailers, either attached by the hosts or by components of the computing system. The compressed memory device comprises a memory directory and a plurality of fixed-size blocks. The system implements a methodology for detaching headers and trailers from sectors before storing the sectors in the me...
In a computer system in which a plurality of hosts is connected through an interconnection network, an apparatus coupled to the interconnection network for allowing the plurality of hosts to share a collection of memory sectors, the memory sectors storing compressed data, is provided. The apparatus includes a network adapter for coupling the apparatus to the interconnection network; a memory for storing the collection of memory sectors; and control logic for managing the memory, the control logi...
A method for maintaining full performance of a file system in the presence of a failure is provided. The file system having N storage devices, where N is an integer greater than zero and N primary file servers where each file server is operatively connected to a corresponding storage device for accessing files therein. The file system further having a secondary file server operatively connected to at least one of the N storage devices. The method including: switching the connection of one of the...
A multi-stage architecture for providing a single switching component in multiplicity to create a single network capable of performing a multiplicity of functions. One function of the disclosed network is to circumvent the traditional blocking problems in multi-stage networks by implementing ALTERNATE PATHS between devices within the same network. This permits a non-blocked path between 2 devices to be found by rearrangeability--the act of trying or searching different alternate paths until a no...
A one-bounce data network comprises a plurality of nodes interconnected to each other via communication links, the network including a plurality of interconnected switch devices, said switch devices interconnected such that a message is communicated between any two switches passes over a single link from a source switch to a destination switch; and, the source switch concurrently sends a message to an arbitrary bounce switch which then sends the message to the destination switch.
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