A phase change memory device is provided which is constituted by memory cells using memory elements and select transistors and having high heat resistance to be capable of an operation at 140 degrees or higher. As a device configuration, a recording layer of which, of Zn--Ge--Te, content of Zn, Cd or the like is 20 atom percent or more, content of at least one element selected from the group consisting of Ge and Sb is less than 40 atom percent, and content of Te is 40 atom percent or more is use...

With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell eleme...

With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell eleme...

A semiconductor non volatile memory device capable of multiple write operations with high reliability includes memory cells. Each memory cell of the device has a first electrode, a second electrode, and an information storage section between the two electrodes. A segregation of composing elements of the information storage section caused by applying a first current pulse from the first electrode to the second electrode is corrected by applying a second current pulse from the second electrode to ...

In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. When the gate voltage of a memory cell selection transistor QM is controlled to afford a low resistance state, the maximum amount of current applied to the phase change portion is limited by the application of a medium-state vo...

In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. When the gate voltage of a memory cell selection transistor QM is controlled to afford a low resistance state, the maximum amount of current applied to the phase change portion is limited by the application of a medium-state vo...