A simple carrier recovery circuit capable of accurately detecting and synchronizing an incoming carrier frequency without the use of a phase locked loop (PLL) is provided. Instead of a PLL, the carrier recovery circuit includes an injection locked oscillator. The injection locked oscillator includes an input for connection to the received modulated signal. The gain of an inverter stage of a amplifier in the injection locked oscillator is modulated by the received modulated signal using an inject...

An improved automatic frequency compensation (AFC) technique and apparatus is provided for piconet applications, e.g., BLUETOOTH.TM. applications. In particular, the present invention provides an offset normalizer which normalizes frequency offset against maximum deviations. By normalizing the frequency offset, before determination of an adjustment of a local oscillator, the local oscillator adjustment becomes uncorrelated with respect to gain along the receiving path (including in a demodulator...

A method and system for providing efficient transmission power control commands to a base station. In a third generation IS-95 CDMA network, for example, cdma2000, the forward pilot channel is used to estimate the received signal power level. In the presently preferred embodiment, a mobile station measures the received pilot channel power, on a forward link pilot channel. The loss experienced on the pilot channel is estimated as the difference between the pilot channel power transmitted at the b...

The present invention provides a baseband RF clock synthesizer having particular use in a BLUETOOTH piconet device, which has the capability of providing simple and accurate calibration of modulation path gain (KMOD) by introducing a dual-loop phase locked loop (PLL) in the RF clock signal synthesizer. The disclosed technique and apparatus controls the maximum frequency deviation by the difference of two locked frequencies, one frequency in each path of the dual-path PLL. Once the PLL is locked ...

The present invention provides a shared I/O port and a configurable interconnect allowing any of a plurality of cores to access any pin of a shared I/O port. Preferably, one of the plurality of cores is designated as a master core at least with respect to the configuration of the shared I/O port(s), and the remaining cores desiring to gain access to the shared I/O port(s) are designated as non-master or slave cores. It is the responsibility of the master core to reassign chip resources such as t...

The present invention provides an architecture for a peripheral device to activate a breakpoint in a processor or other device under emulation. A peripheral breakpoint active signaler allows the peripheral to signal the occurrence of a breakpoint to the processor using a halt or trap line to the processor. This invention provides developers with increased code development capabilities by allowing them to set breakpoints in a peripheral device for the benefit of a processor interfaced with the pe...

A digital phase locked loop includes a digital phase detector which provides a magnitude control signal to adjust the step size of up and down adjustments in the phase/frequency of a digitally controlled oscillator, resulting in shorter lock-in or acquisition time and smaller jitter as compared to conventional digital phase locked loop devices. In the disclosed embodiments, the digital phase detector includes multiple bit shift registers in both the up and down directions to count or measure a n...

Apparatus, and an associated method, for allocating resources in a communication system, such as a multi-code, multi-rate CDMA communication system. Communication indicia by which data to be communicated during operation of the communication system is coded and modulated is selected responsive to communication characteristics of the communication channel upon which the data is to be communicated. The levels of coding and modulating are determined responsive to measured levels of the communicatio...

Apparatus, and an associated method, for a CDMA communication system. Both closed-loop, power-controlled communication services and best-effort communication services, upon shared channels, are provided in the communication system. A predictor predicts subsequent power level requirements in the system and an allocator allocates power levels at which to communicate best-effort communication signals to effectuate the best-effort communication services.

A display system adapts a display page to a small display area using semantic information indicated by portions of the display page that are designated as cacheable. The display system adapts a display page by identifying leaf fragments, that is, fragments that contain no other fragments. The display system then determines whether each leaf fragment is a block that can be displayed as a unit in the display area or should be subdivided into blocks that each can be displayed as a unit in the displ...