Semiconductor device testing apparatus and method for testing a semiconductor device, includes: a pattern generator (10) which, based on a predetermined control sequence, generates an input signal pattern (12) and an expectation data signal pattern (14); a comparison unit (90) which compares an output signal pattern output from the semiconductor device and the expectation data signal pattern, and outputs a match signal when the output signal is matched with predetermined data determined based on...

A test signal supplying apparatus for a semiconductor device testing apparatus that tests a plurality of semiconductor devices; including: a test pattern generating unit for outputting an input signal pattern to the semiconductor devices and receiving a match signal which indicates the semiconductor device, to which the input signal pattern is applied, is passed in the test; and a match-fail detecting unit for receiving the match signal to detect a semiconductor device that fails in the test and...

A semiconductor tester for testing a semiconductor device by generating pulses of different repetition periods to a DUT having ports of different periods (frequencies) without using plural timing memories holding timing sets. The semiconductor tester required to generate a timing edge pulse of a period M different from a test period N of the semiconductor tester comprises period converting means capable of generating a timing edge pulse of the period M different from the period N of the test rat...

A pattern generator includes a main memory for storing a plurality of sequence data blocks for generating a test pattern, a first sequence cache memory for sequentially storing the sequence data blocks, a second sequence cache memory, a data development section for sequentially executing the sequence data blocks stored in the first cache memory and generating a test pattern and a read-ahead means, when the data development section detects a read-ahead instruction on reading ahead the other seque...

A timing generator compensates the difference between the reference clock frequencies by converting the base number for generating the timing signals corresponding to the ratio of reference clock frequencies. The timing generator includes: a data memory for dynamically receiving the timing data through the software process to determine the time length of the timing signals where the timing data is formed of a quotient produced by a division of the time length by a time period of a reference cloc...

A timing generator generates the same timing signals even when the frequency of a reference clock is changed. The timing generator includes a data memory for storing the timing data formed of quotient data and fractional data, a counter for counting the number of reference clock pulses and producing a delay time expressed by the quotient data, an accumulator for accumulating the fractional data and generating a carry signal when the accumulated value exceeds the reference clock period where the ...

In order to determine data stored in a memory cell of a resistive cross-point cell array, two reference cells having two different known resistance values (e.g., data "0" and data "1") are provided, and a difference in current between a selected cell and the reference cell having data "0" and a difference in current between the selected cell and the reference cell having data "1" are compared. By comparison with a current of the reference cell which has a parasitic current as with the selected c...

A test apparatus that tests a device under test, including a main memory having an expectation pattern storing region storing an expectation pattern sequence to be sequentially compared with output patterns sequentially output from a terminal of the device; a test pattern outputting unit for sequentially inputting a plurality of test patterns into the device; a capture unit for sequentially acquiring the output patterns into an output pattern storing region on the main memory; a memory reading u...

A magnetic amorphous alloy having a compositional formula in which 5.ltoreq.x.ltoreq.10, 0.5.ltoreq.y.ltoreq.4, and 20.ltoreq.w.ltoreq.90.

The present invention relates to a method for manufacturing a liquid crystal display utilizing the dispense-injection method, and it is an object of the invention to provide a method for manufacturing a liquid crystal display which allows an optimum quantity of liquid crystals to be dispensed on each substrate. At a dispense-injection step, in the case of a two-shot process for fabricating two liquid crystal display panels from a single glass substrate, the heights of support posts on two CF sub...