
A dynamic random access memory utilizing MOSFET transistors formed on a single semi-conductor chip is described. The random access memory utilizes 1,024 binary storage cells arrayed in rows and columns. Each row of cells has a read line and a write line. Each column of cells has one data line used for both read and write functions. Each cell is comprised of a write transistor and a pair of read transistors. The write transistor couples a capacitive storage node to the data line and is controlled...











