By using an electrophoretic buffer comprising a polymerized polymer micelle formed by the steps comprising dispersing into an aqueous medium a block copolymer represented by HPLS-HPBS-PLZA, wherein HPLS is a hydrophilic polymer segment, HPBS is a hydrophobic polymer segment, and PLZA is a polymerizable group having an ethylenically unsaturated double bond, and polymerizing the block copolymer as a buffer for a capillary electrophoresis or a microchip electrophoresis, pressurizing the sample afte...

A buffer having a buffer body of foamed synthetic material, e.g. polyurethane, which buffer body is at least on that side thereof which is exposed to heat covered by a mantle made of a good heat conducting material and adapted to follow the compression and expansion movement of the buffer body.

A circuit of complementary field effect devices whose logical input threshold voltage can be varied between levels suitable for TTL logic or CMOS or PMOS or other logic under control of an electrical signal in real time.

An input buffer which is coupled to a direct voltage source and ground, includes at least one CMOS device and an enhancement mode NMOS transistor, receives at least one input signal and provides one output signal. The input buffer makes use of the enhancement mode NMOS transistor to lower the potential difference between the gate terminal and the source terminal of the PMOS transistor of the CMOS device. Thus, the input buffer can lower the turning on degree of the PMOS transistor effectively. T...

In a friction buffer stop, each side wall of the buffer structure has at its lowermost edge mutually spaced slots extending parallel to the adjacent rail, each slot being directly opposite to and of the same length as a slot in the other side wall. Pairs of transversely spaced two-part clamps detachably secure each side wall to the rails. Each clamp comprises a pair of side plates clamped on opposite sides of the rail by a clamping bolt passing through one of the mutually spaced slots. The slots...

A buffer circuit includes an input amplifier connected to receive an input signal and an output amplifier connected provide an output signal. A differential amplifier is connected to also receive the input and output signals and to provide an output related to the difference between the signals to maintain a desired relationship between the input and output signals. The buffer circuit can be configured so that the signal from the differential amplifier is provided either to the input or the outp...

A high speed propane power buffer is provided with a dust evacuation system. A peripheral skirt is telescopically depended from a hood overlying the high speed rotating buffer pad. This skirt, at the extremity adjacent the surface to be polished, is supplied with angularly inclined grooves sloped away from the radial disposition with respect to the buffer. These angularly inclined grooves slope from the outside of the skirt to the inside of the skirt in the direction of buffer disc rotation at t...

An address buffer which allows for the simultaneous selection and/or deselection of a plurality of rows and/or columns within a memory array. A first and a second circuit generate a true and a complementary signal, respectively, during normal operations of the integrated circuit. When desired, the first and second circuits may be used to generate two signals of the same voltage level. The two signals of the same voltage level may then be used by an address decoder to simultaneously select and/or...

In one embodiment, the present invention includes an input buffer with a common gate amplifier having input terminals coupled to receive an incoming common mode voltage. The common gate amplifier may be configured to receive the incoming common mode voltage over a wide range of levels extending from a low end lower than a supply voltage of the input buffer to a high end exceeding the supply voltage.

A buffer amplifier, which includes a first differential signal amplifier including first and second NMOSFETs (N-type metal-oxide semiconductor field-effect transistors) amplifying differential input signals; a second differential signal amplifier including first and second PMOSFETs (P-type metal-oxide semiconductor field-effect transistors) amplifying the differential input signals; a first feedback resistor including an end commonly connected to drains of the first NMOSFET and the first PMOSFET...