
An error correction circuit for an analog-to-digital converter is shown wherein and analog-to-digital converter includes a counter-and-storage circuit that stores an analog input signal in the form of a preliminary digital signal. An error sample-and-hold circuit receives an error signal, including switching and offset errors, generated by the analog-to-digital converter and stores that signal while the switching and offset errors are removed therefrom. The resulting signal is then applied to a ...











