A sub-stoichiometric oxide, nitride or oxynitride layer in an optical stack, alone or in direct contact with one or two stabilizing layers, stabilizes the optical properties of the stack. The stabilizing layer(s) can stabilize the chemistry and optical properties of the sub-stoichiometric layer during heating. The change in optical characteristics of the sub-stoichiometric layer upon heating can counter the change in optical characteristics of the rest of the optical stack.

A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges...

New anthraquinone dyestuffs of the general formula I ##STR1## wherein Hal is a halogen atom and the two radicals R are each H or NH.sub.2 and the alkyl group has 1-8 C atoms, exhibit a high order parameter and are suitable for use as components of liquid-crystal dielectrics.

The present invention relates to a ceramic dielectrics. It is difficult to downsize a MgTiO.sub.2 -base ceramic composition conventionally used, having an insufficiently high relative dielectric constant (.di-elect cons..sub.r), less than 20, while a CaTiO.sub.3 -base ceramic composition, having a small value of Q, is not suitable for electronic devices processing a signal in the high-frequency-bandwidth. Moreover, it is difficult to control the temperature coefficient of resonant frequency of t...

The present invention is directed to an apparatus and method for reliability testing of an integrated circuit. The present invention provides a test structure and method for testing gate and node dielectrics of an integrated circuit wherein a self-heating gate structure is integrated with the product structure itself. Selected conductive lines within the product structure are used as heater elements to provide temperature stressing of the integrated circuit. The localized self-heating gate struc...

The present invention provides to a ceramic composition for high-frequency dielectrics which comprises the main ingredients of ZrO.sub.2, SnO.sub.2 and TiO.sub.2 and a subsidiary ingredient of (Mn(NO.sub.3).sub.2.4H.sub.2 O). In accordance with the present invention, a homogeneous ceramic composition can be prepared by a process which comprises the steps of: adding ZrO.sub.2, SnO.sub.2 and TiO.sub.2 by the molar ratio to satisfy (ZrO.sub.2).sub.1-x (SnO.sub.2).sub.x (TiO.sub.2).sub.1+y (wherein,...

A dielectrics dividing wafer, and a method of manufacturing the wafer, is disclosed in which embedded dielectric films are provided in the interior of the wafer in a predetermined pattern extending laterally parallel to a face surface of the wafer, and partition dielectric films, in the form of vertical walls extending from the face surface and the rear surface of the wafer, to the embedded dielectric films, are provided to define semiconductor areas extending continuously from the face surface ...

A method for manufacturing highly heat resistant dielectrics is provided wherein an oligomeric and/or polymeric hydroxypolyamide is dissolved in an organic solvent and then applied to a substrate. The solvent is removed and the hydroxypolyamide is converted into a polybenzoxazole by annealing at a temperature of between 200.degree. to 500.degree. C. The resulting dielectrics are stable up to 550.degree. C. and have a continuous temperature resistance of more than 3 hours at 470.degree. C. The di...

An apparatus for monitoring and recording multiple gate dielectric leakage currents during a reliability characterization test. The large number of devices tested allows for longer testing at lower voltages thereby minimizing the need to rely on mathematical models. Solid-state multiplexers (MUX) at multiple levels of test apparatus assembly eliminate excess wiring and allow for constant scan monitoring of the devices under test (DUT) without concern for wearout of electromechanical switches. Da...

A method is provided for forming tantalum adhesion/barrier layers on semiconductor channels or in vias in low dielectric constant, fluorinated dielectric layers. The dielectric layers are defluorinated using hydrogen, ammonia, methane, or silane plasma and a subsequent tantalum deposition forms a less fluorine reactive tantalum carbide or tantalum silicide. Tantalum or tantalum nitride is then deposited over the less reactive form of tantalum to form the adhesion/barrier for deposition of a subs...