A dynamically balanced protective cap for exhaust pipes, including a tubular element having an angulated bias cut defining a slanted opening at one end thereof. A closure flap assembly is pivotally secured to the tubular element for pivotation about a horizontal axis. The closure flap assembly includes a closure plate configured to lie across the close the slanted opening at one end of the pipe. The flap assembly also has a pair of parallel, trapezoidally shaped balancing plates, each secured al...

An electron gun system according to the invention comprises means including cathode means for developing an electron beam. Main focus lens means, which has a plurality of electrode means situated on a common axis, provide for receiving the electron beam and forming a focused electron beam spot at the screen of the tube. Means are provided for developing and applying to the electrode means potentials effective to form one or more focusing field components between the electrode means. The lens mea...

An extrudable fluoroelastomer comprising a gelled fluoroelastomer having units of vinylidene fluoride and units of at least one other fluorine-containing monomer copolymerizable with vinylidene fluoride, said monomer containing from 2-7 carbon atoms, containing no bromine atoms and containing at least as many flourine atoms as carbon atoms, said fluoroelastomer having been simultaneously mixed, sheared and gelled by an organic peroxide gelling agent to a gel content of from about 15-80% by weigh...

A flying head slider is flown above a rigid rotating magnetic disk at such a height that it is both aerodynamically stable and immune to collisions with disk asperities. A position adjustable magnetic transducer is mounted on the slider and is controllably lowered to an operating position very close to the disk where its position is maintained by a servo system. An anticipator probe detects the presence of asperities on the disk in the path traversed by the transducer, and generates a control si...

A method and apparatus for dynamically reconfiguring a processor involves placing the processor in a first configuration having a first number (m) of strands while the coded instructions comprise instructions from a number (m) threads. The instructions in each of the m threads are executed on one of the m strands using execution resources at least some of which are shared among the m strands. While the coded instructions comprise instructions from a number (n) threads, the processor is placed in...

A method for dynamically balancing a centrifugal blower fan wheel is disclosed. The method includes the steps of determining an amount and location of change in the fan inlet ring of the blower wheel which is required to balance the blower wheel. Once this determination is made, the radial thickness of the inlet ring is increased at a predetermined location to provide the proper amount of balance to the blower wheel. A mold is described for accomplishing this method.

Data transfers across a computer data connection are timed to measure the throughput of the connection. A counter in a computer system is updated to account for each measurement and the counter's value is checked to determine whether to allow the system's background tasks to operate.

Dynamic balancing reduces quadrature bias in microfabricated vibrating instruments such as tuning fork gyros so that a purity of motion is achieved in the absence of any angular rate input. Balancing is achieved by ablating (74) or depositing (72) onto support structure (62) for a tuning fork gyroscope rather than the proof mass (60) itself by melting and moving material on a tuning fork beam (62). Such adjusting is advantageously done during actual operation of the gyro by laser beam applicatio...

A processor is provided that has a data memory that may be addressed as a dual memory space in one mode and as a single linear memory space in another mode. The memory may permit dual concurrent operand fetches from the data memory when DSP instructions are processed. The memory may then dynamically permit the same memory to be accessed as a single linear memory address space for non-DSP instructions.

An improved chip sparing system and method of operation are provided in which a failed chip is detected even if there are multiple errors on a single chip and one or more spare chips are provided within the system; and in which spare chips or space chip I/Os are dynamically inserted into the system upon detection of a failed chip or chip I/O without the necessity of shutting down and rebooting the system or even without the necessity of re-initializing the memory.