An insulated gate, field effect transistor is fabricated by covering a surface of a body of doped semiconductor material with a first layer of a dielectric material covered by a second layer of a dielectric material masking layer covered by a third layer of a highly doped semiconductor material. The third layer is defined to provide a gate electrode having exposed sides, and the sides are covered with a protective thermally grown oxide layer, the masking second layer preventing the growth of the...









