Disclosed is the physical construction and electrical control circuit of a fault indicator designed to provide a water-tight structure for the indicator. One face of the indicator is visible through the sealing apparatus, the sealing apparatus enclosing the structure on all sides other than the indicator face side. The indicator is capable of being submerged and will withstand a water pressure of 8 psig to meet specifications established by electric utilities. The electrical control circuit norm...

A detector/annunciator circuit for monitoring the status (opened or closed) of field process switches. A two lead "End of Line Device" (ELD) is field mounted proximate the switch, and, during normal operation, detects switch status and transmits this information to panel mounted logic that decodes and annunciates the information. If the ELD's lead wires become open or short circuited, or are subjected to a ground fault, the panel mounted logic can identify the fault, diagnose its type, and annun...

In a first aspect, a method of synchronizing at least two computing elements that each have clocks that operate asynchronously of the clocks of the other computing elements includes selecting one or more signals, designated as meta time signals, from a set of signals produced by the computing elements, monitoring the computing elements to detect the production of a selected signal by one of the computing elements, waiting for the other computing elements to produce a selected signal, transmittin...

Data transfer to computing elements is synchronized in a computer system that includes the computing elements and controllers that provide data from data sources to the computing elements. A request for data made by a computing element is intercepted and transmitted to the controllers. At least a first controller responds by transmitting requested data to the computing element and by indicating how a second controller will respond to the intercepted request.

Faults occurring in a telecommunications system are monitored identifying their time of onset and reporting them to an operator through an interface if they have not cleared within a predetermined interval. Transient faults, which do clear within that interval, are not reported directly, but only if such faults occur more frequently than a predetermined rate. This is determined by establishing a scan interval, and an analysis period equal to a plurality of scan intervals, monitoring the system c...

Fault resilient or fault tolerant computers are produced by designating a first processor as a computing element, designating a second processor as a controller, connecting the computing element and the controller to produce a modular pair, and connecting at least two module pairs to produce a fault resilient or fault tolerant computer. Each computing element of the computer performs all instructions in the same number of cycles as the other computing element. The controllers provide input/outpu...

A fault tolerant/fault resilient computer system includes at least two compute elements connected to at least one controller. Each compute element has clocks that operate asynchronously to clocks of the other compute elements. The compute elements operate in a first mode in which the compute elements each execute a first stream of instructions in emulated clock lockstep, and in a second mode in which the compute elements each execute a second stream of instructions in instruction lockstep. Each ...

Status estimation is determined for an entity having a plurality of components. An original disjunction of diagnostic expressions indicating at least one of a fault-free or at least one fault mode for at least one of the components is determined, which is then investigated against a set of diagnostic test results, and expressions that do not imply the test result are discarded. Further, for each statement in the test result, a joint diagnostic expression is generated representing a conjunction o...

The performance of each component in the system is defined by performance parameters x, which are related to measurement parameters z expressed as a function h( ) of the performance parameters x and operating parameters w. The method comprises: (a) setting an assumed maximum number of fault affected components and defining a series of fault classes corresponding to possible outcomes in terms of faulty components, (b) creating an initial population of strings for each fault class, each comprising...

A circuit for detecting a fault on a bi-directional data line. The circuit includes: an input/output terminal connected to one end of the bi-directional line; a data receiver having an input coupled to a second end of the bi-directional line for receiving data on the terminal; a data driver having an output coupled to the second end of the bi-directional line for producing data on the terminal; an XOR gate having a pair of inputs, one being coupled to an output of the data receiver and the other...