A semiconductor integrated circuit having improved information processing function is disclosed. The integrated circuit comprises a semiconductor substrate, an information processing circuit fabricated on the substrate, a plurality of unit cells each having at least one transistor, a first discretionary wiring for connecting between transistors of the unit cells and a second discretionary wiring for connecting between the information processing circuit and some of the unit cells.

An integrated circuit comprises a substrate having a plurality of components electrically isolated by regions of amorphous material formed by laser irradiation. Typically the laser radiation has a wavelength less than 400 nm a pulse length between 0.1 and 10 .mu.sec, and a power density between 0.1 and 0.8 J/cm.sup.2. The substrate material may be Si, Ge, GaAs, GaAlAs, InAs, InP, InAlP.

A high-density integrated circuit employing different first and second channel types of insulated gate field effect transistors is disclosed, which comprises at least three stacked wiring layers, the lowest layer being formed of polycrystalline silicon and including silicon gates of the transistors, one of the upper layers being formed of polycrystalline silicon and used for feeding a power supply to some of the transistors and being connected to at least one well region on which the first chann...

A superconductor which includes a housing of a highly pure copper having a slot therein for accommodating a plurality of monolithic superconductor members and a reinforcing member. A highly pure aluminum lid or cover is adapted to be disposed in an opening of the slot, with outer surfaces of the lid or cover having arranged thereon highly pure copper. The lid or cover, the monolithic superconductor members, the reinforcing member, and the housing are integrated and bonded together by a bonding m...

A compact integrated logic circuit having an inverter transistor and several coupling diodes adjoining the collector region of said transistor. Current is applied to the base of the transistor which forms the signal input. The inverter transistor has additional means by which an effective complementary auxiliary transistor is incorporated which dissipates a considerable part of the base current in the case the inverter transistor is overdriven so that the charge storage in the inverter transisto...

In an integrated circuit array having a capacitance formed by a pn-junction and separated from other components by a pn-junction, semiconductor areas are provided which connect that zone of the two semiconductor zones forming the pn-junction of the capacitance that extends deeper into the semiconductor element than the other of the two semiconductor zones forming the pn-junction of the capacitance electrically to that zone of the two semiconductor zones forming the separating pn-junction that fa...

A digital data storage circuit for a digital signal processor which is capable of receiving asynchronous inputs and is such as to be testable by selectively configuring the storage circuits as a shift register enabling the entry and extraction of test data in the processor. The storage circuit includes two latch elements each formed by two complementary transistor inverter circuits connected in a positive feedback arrangement and in which the output current capability of the second inverter circ...

An integrated circuit structure has a number of device areas each of which is configurable in a subsequent customizing process as a field effect transistor, a bipolar transistor or as a pair of those devices. Configuration of the structure is determined by correspondingly selective etching of a polysilicon layer disposed on the structure.

A high speed I.sup.2 L circuit having a topology which is based on a layout of parallel arranged gate circuits in which the inverter transistors of each gate circuit are arranged in a row and below the signal lines to which they are connected, said signal lies extending transversely to the rows, while the complementary transistors for the current supply of the inputs of the gate circuits are situated laterally beside the signal lines. Said layout facilitates the designing of comparatively compac...

A bipolar lateral transistor is formed in a highly doped p.sup.- -type well (13) the base contained in a lightly doped n.sup.- -type well (12) the collector in a very lightly doped p.sup.-- -type substrate (11). The arrangement is such that the boundary of the collector/base depletion region is distributed so that the non-depleted base region is wide below the emitter but very narrow at the surface. This defines a narrow active base region in the lateral emitter-collector path thus ensuring that...