An electronic system is packaged to provide a single etched backplane. Bus bars are physically fastened to bushings which are soldered to the backplane power etch lines to provide power to the system. Printed circuit boards are plugged into connectors mounted on the backplane for receiving power and transferring logic signals between printed circuit boards. A number of power supplies are plugged into connectors mounted on the bus bars for transmitting power, and plugged into connectors for trans...

An integrated circuit having a built-in self test facility, the integrated circuit being partitioned into a number of sub-circuits each of which comprises a combinatorial logic circuit and a register. The sub-circuits are coupled together so that each combinatorial logic circuit has its inputs coupled to at least one register, has its outputs coupled to at least one register, and the output of the overall integrated circuit is taken from one or more registers. Each register has its fucntional mo...

In a semi-custom integrated circuit, e.g. a bipolar analogue array, underpass areas are so configured as to permit operation as capacitors by suitable configuration of a user determined interconnection pattern. Typically each underpass comprises a highly doped region disposed over a buried layer. A thin oxide layer is applied to the surface of the underpass. Suitable configuration of polysilicon and metal masks provides either a cross-over or a capacitor.

An integrated circuit having a memory capable of being tested protects data stored in the memory from being read out of the integrated circuit during testing. Data input during memory testing is internally compared with data stored in the memory. The integrated circuit also outputs the accumulated comparison results. The output comparision result also may differ from the data in timing. An input unit includes an external terminal and a plurality of buffers for controlling data input and output t...

A semiconductor memory cell with parallel gates is disclosed. The direction of the gates is desirably chosen to minimize lithographic astigmatic effects. Thus gates of comparatively uniform width are produced and predictability of transistor performance thereby improved. Another embodiment of the invention features a connetion between two conductive layers and a source/drain. The connection forms a node between one access transistor and one pull-down transistor.

Improved epitaxial resistor for use in integrated circuits in which for the lateral boundary boundary zones projecting beyond the isolation zones are provided at the surface with a depth of penetration which is smaller than the thickness of the epitaxial layer. Such resistors can be manufactured with a considerably smaller spread of the resistance value than the so far usual epitaxial resistors.

A monolitic transistor amplifier includes a negative feedback network between the output stage and an input stage. The network comprises one or more resistive voltage divider L-link with shunt elements which have a higher temperature coefficient than its series elements. The shunt elements have resistors which are in close thermal contact with the output transistor causing the negative feedback to increase with the current passing the output transistor. The shunt resistors are formed in the coll...

An integrated circuit including a first device having respective input and output electrodes at opposed first and second faces of a semiconductor block in which the device is formed, and a second device, formed in the semiconductor block, having its respective input and output electrodes at the first and second faces of the semiconductor block, the electrodes at the first face of the semiconductor block intermingling with each other. In one form of the integrated circuit, the electrode of the fi...

Lasing threshold for a whispering mode laser is reduced by appropriate placement of a reflector. A reflector parallel to, and within a wavelength distance of, the disk decreases radiation loss due to imperfect internal reflection. Enhancement is calculable on the basis of destructive interference between reflected and direct radiation.

A solder preform containing a series of islands that are joined together in a matrix by bridging bands. Each band has a reduced cross-sectional area in its midregion. In one form of this invention, at least some of the islands contain pin receiving holes formed therein and solder tabs that are arranged to frictionally engage a pin that is passed into the hole to prevent the preform from being misaligned or dislodged from the pins and which at the time of bonding, prewets the pins to promote flow...