
A CMOS inverter capable of operating at low voltages is provided. The gate of a p-channel MOS transistor and the gate of an n-channel MOS transistor are AC coupled to an input terminal via first and second capacitors, respectively. Signals whose amplitude centers are optimized according to the threshold voltages of the p- and n-channel MOS transistors by bias voltages from first and second variable voltage sources, respectively, are supplied to the gates of these MOS transistors. In consequence,...











