A multiprocessor which includes a plurality of processing units interconnected by a global bus. Each processing unit has the capability for initiating control instructions including notification instructions and for selectively transmitting the control instructions over the global bus to the plurality of processing units and trigger device for initiating execution of the control instructions as a destination processing unit. A multiprocessor so constructed is capable of executing blocks of instr...

A multiprocessor system the kind in which two or more separate processor modules are interconnected for parallel processing includes two redundant interprocessor buses dedicated exclusively to interprocessor communication. Any processor module may send information to any other processor module by either bus. The buses are shared in use by the processor modules on a time-sharing basis. Use of each bus is controlled by a special bus controller. The multiprocessor system includes an input/output sy...

A multiprocessor system includes processor units connected physically in one-dimensional fashion along a ring bus located at the node of each processor element and associated local memory, so that various system operating modes are possible. The ring bus is used for inter-processor data transfer, with the address and read/write signals to each local memory being supplied from the processor element (by the program). Sychronization between the data flow on the ring bus and the processor operation ...

A multiprocessor system the kind in which two or more separate processor modules are interconnected for parallel processing includes two redundant interprocessor buses dedicated exclusively to interprocessor communication. Any processor module may send information to any other processor module by either bus. The multiprocessor system includes a memory system in which the memory of each processor module is divided into four logical address areas--user data, system data, user code and system code....

A multiprocessor system comprising a plurality of processors and a memory unit which are connected through a common bus whereby each processor communicates with the memory through the bus. Communication among processors is effected by storing in a plurality of memory zones the messages intended for the several processors. The memory zones are each dedicated to one processors, but are accessible to all the processors. The communication among processors is performed by sending a notify signal on t...

A multiprocessor system, the kind in which two or more separate processor modules are interconnected for two power supplies, provides the entire power for the device controller in the event the other power supply fails. The distributed power supply system permits any processor module or device controller to be powered down so that on-line maintenance can be performed in a power-off condition while the rest of the multiprocessor system is on-line and functional. The multiprocessor system includes...

A Multiprocessor computer system in which each processor has a fault channel which can be accessed by another processor of the system, thereby permitting operation of the former processor to be monitored by the latter. The fault channel effectively provides the latter processor with all the facilities which are provided to a human operator by the control console of a conventional computer. Each processor is arranged to open its fault channel, and issue a request for attention by another processo...

In a multiprocessor system of the type in which two or more separate processor modules are connected by an interprocessor bus dedicated exclusively to interprocessor communication for parallel processing, there is provided an input/output system having multiported device controllers connected to the multiprocessor system by input/output buses. Each device controller is shared by pairs of the processor modules, and includes logic that ensures that only one port is selected for access at a time.

Multiprocessor cratecontroller, containing control microprocessor with storage, each of them bi-directionally connected with the bus of the microprocessor. A data channel control processor is connected with a program storage, a multiplexer, an address register of the program storage, an interruptions handling processor, a data address register, a data register and the bus of the microprocessor. The program storage is connected with the bus of the microprocessor, with the register of stations, wi...

The multiprocessor system enables rapid comparison of results determined from input data at the individual microprocessors. During a first phase of the comparison the results which are to be compared are transferred from the individual microprocessors to counters in connection logic components each of which is associated with an individual microprocessor. During a second comparison phase which is started by activating a comparison line to which all the connection logic components are connected v...