In an adaptive delta modulation system, the delta modulated output signal is applied to a logic circuit which derives from such signal a pulse train used to develop the system's quantization step-size control voltage. The output pulse train of the logic circuit is applied to a circuit which serves the function of an integrator although digital in operation. The digital circuit develops a digital output signal whose value depends upon the number of pulses appearing per unit time in the logic circ...

A network is described wherein a plurality of processors are connected in a hierarchy of levels with provision for communication between the various processors. A Global Memory Module (GMM) and a system hierarchy of processors is described which provides access to a plurality of addressable memory storage units. A multiple number of processors or computer systems are connected to one or more Global Memory Modules whereby memory resources may be shared by multiple processor systems and where cont...

In the exemplary embodiment, in order to reduce the load on the input signal sources, the individual inputs are respectively connected to the respectively appertaining coupling point switches via a fan-out arrangement of constantly unlocked ECL elements with a plurality of negating or, respectively, non-negating outputs. In order to take such negations into consideration, a respective half of the cross point switches are formed by means of AND gates and one respective half is formed by means of ...

A network of processors having a cellular structure is capable of directly and efficiently executing a predetermined class of programing languages such as applicative languages. The network includes two interconnected networks of processors, one of which is a linear array of cells of a first kind and the other a tree network of cells of a second kind. The network directly interprets a high level language and is capable of operating on a wide range of classes of programs. Within practical limits,...

An impedance transformation network includes a trifilar wire configuration in which each of three conductors, each having first and second respective ends, is equally spaced with respect to one another over a predetermined length. A substantial portion of the trifilar wire is surrounded by a ferrite material. The first and second ends of a first conductor are connected to first and second connection points of a first circuit. The first end of a second conductor is connected to a first connection...

A beam-forming network having zero boresight error comprising a network hng symmetry about the network centerline.

Several strips of resistive material are deposited on a top surface of a dielectric substrate having an opposite bottom surface substantially covered by a conducting material. A strip of conducting material is also deposited on the top substrate surface in electrical contact with the strips of resistive material. At least one of the strips of resistive material is electrically connected to the conducting material on the bottom substrate surface.

A permanent elastic net-shaped bandage including a fabric with elastic threads as warps and with non-elastic threads transverse thereto forming wefts. More specifically, the warps are designed as fringe warps of non-elastic threads and are independent of each other while being backed by an elastic synthetic thread. The non-elastic wefts comprise upper and lower wefts which always rest on the same spot of the fringe warp, which is engaged by the adjacent upper and lower wefts, and between the ski...

The balancing network is disclosed for use in a circuit for connecting a two-wire subscriber's line to a four-wire transmission line which automatically matches the impedance of the subscriber's line by utilizing the direct current flowing in the subscriber's line.

A timing generator circuit includes a pair of multitap cascaded delay lines of like construction. Each delay line includes a plurality of sections each of which are constructed to provide the same increment of delay at each tap. A capacitive element connects between predetermined taps of the two delay lines to form a compensation network including a predetermined section of each delay line. The compensation network which operates to cancel out the effects of any mismatch resulting from connectin...