An output apparatus comprises: a cache memory to temporarily store the bit map pattern data which was developed to the bit map pattern on the basis of character information; an accumulating device to accumulate a plurality of bit map pattern data extracted from the cache memory; a rewriting unit to rewrite the bit map pattern data stored in the cache memory; a print controller to print on the basis of the data accumulated in the accumulating device; a detector to detect an operating state in the...

A patterning area of an output circuit is reduced while securing strong enough ESD tolerance. In the output circuit of this invention, an output of a first amplifier and an output of a second amplifier are connected to a common output pad. Each of the amplifiers is driven by each of signals .PHI.1 and .PHI.2 from an internal circuit, respectively. The first amplifier has larger driving capacity than the second amplifier. A high voltage side power supply terminal of the second amplifier is provid...

In a first and second logic circuit controlling a driver circuit of CMOS configuration having a plurality of output transistors connected in parallel, a delay fluctuation clock signal and a delay fluctuation data signal are generated by generating multi-phase data signals from multi-phase clock signals that each have a different phase difference with respect to a reference clock signal, and using a delay circuit having a variable delay time reflecting the change of the current driving capability...

The present invention relates to an output circuit. A first external power is supplied to be used as a second external power in a normal operating mode, an the supply of the power is shut off and an output driver is made to have a HIGH impedance state in a deep power down mode, by a control signal that is applied as different potentials in the normal operating mode and the deep power down mode. Therefore, it is possible to prevent consumption of internal current and introduction of a signal from...

A low-noise output buffer for a digital signal is based on an analog amplifier having bandwidth greater than the switching rate of the digital logic signal. A converter circuit converts the digital logic signal to a ramp signal provided as an input to the analog amplifier. The ramp signal has a slope determined by a bias current and an input capacitance of the analog amplifier. The bias current is generated by a bias circuit such that the bias current varies as the input capacitance of the analo...

An output circuit includes a source follower constituted by a n-channel MOS transistor, having a drain connected to a power source and a source connected to an output terminal, and applying an output voltage to a load through the output terminal when a gate is charged, a voltage detector determining if the output voltage is at a first voltage or at a second voltage level, a first discharge circuit discharging the gate of the source follower according to an inputted turn-off signal when the outpu...

It is an object of the present invention to provide an output circuit capable of reducing a consumption current while an output current is suppressed in a case where limitation is placed on an output voltage so as not to fall to a predetermined voltage or less in an output circuit the emitter of which is grounded, the base of which serves as an input node for a control current and the collector of which serves as an output node. Provided are a base current supply section for supplying a base cur...

An output apparatus includes a memory for storing output environment setting information for setting information designating an output environment, from among plural possible output environments, a registration unit for registering the output environment setting information in the memory, a read-out unit for reading out desired output environment setting information from the memory and an output environment setting unit for setting an output environment on the basis of the output environment set...

An output circuit includes: a constant voltage source; a first transistor of a first-conductivity type having a gate connected to the constant voltage source; a second transistor of a second-conductivity type that is opposite to the first conductivity type, having a source connected to a source of the first transistor and a gate connected to a circuit input terminal; a third transistor of the first-conductivity type having a drain connected to a circuit output terminal and a gate connected to th...

An output circuit comprising a pair of input-stage transistors supplied with an input signal, a pair of output-stage differential transistors constructing an output-stage differential circuit, a pair of wiring lines having first ends connected to the input-stage transistors, respectively, and second ends connected to the bases of the output-stage differential transistors and connecting the input-stage transistors and the output-stage transistors, respectively, a pair of input-stage constant curr...