A capacitive goniometer comprises a plurality of like conductive annular sectors supported in mutually substantially coplanar relationship so as to define an axis which extends through the center of the annulus and is substantially perpendicular to the common plan of the sectors. A conductive member having a generally arc rate outer periphery is supported in spaced confronting relationship with the sectors with the outer periphery of the conductive member not extending substantially farther radi...

A phase comparator includes a first signal input terminal supplied with a reference signal, a second signal input terminal supplied with an input signal to be compared with the reference signal, a first gate circuit having a pair of input terminals and an output terminal, one of the pair of input terminals of which is connected to the first signal input terminal, a second gate circuit having a pair of input terminals and an output terminal, one of the pair of input terminals of which is connecte...

A four phase to two phase correlator is incorporated within the demodulator section of a spread spectrum modem to process a received RF signal modulated by a transmitted PN code and a digital data signal. The correlator includes a first modulator for combining the channel 1 and channel 2 R code signals with the received RF input signal to generate a first channel 1 RF signal and a first channel 2 RF signal. The first channel 1 RF signal is modulated by the transmitted PN code signal, the channel...

A phase comparator for a digital phase locked loop which provides first and second order error signals for phase and frequency correction of a voltage controlled oscillator in the loop with respect to data being read for self synchronization of the data. A first order error signal is generated in a first phase detector which operates only during a VCO "unsafe" condition, i.e., when a data pulse is beyond a present limit. A finer, second order error signal is generated in a second phase detector ...

An apparatus for providing a logical output indicative of when a signal is ither in-phase with a reference signal or alternately 180.degree. out-of-phase with a reference signal. Pulses are produced at each transition of the waveforms to be compared. A determination of their concurrence is then made and compared with a logical result of the inputs whereby a logical output indicative of whether the signals are in-phase or 180.degree. out-of-phase is generated.

First and second transistors are connected at their bases to share a bias current supplied to them from a constant current generator. The emitter electrodes of the first and second transistors are connected respectively to the input terminal and to the output terminal of a current mirror amplifier. Input signal applied to the input terminal of the current mirror amplifier causes push-pull variations in the collector currents of the first and second transistors.

A phase or frequency modulator having an operational amplifier with inverting and noninverting terminals, an RC network wherein R is light responsive, a control signal for controlling the light intensity, and a phase detector for comparing the phase of the modulated and unmodulated signal and feeding back an error signal to the light source.

A body providing an interior helical flow path for separation of fluid in the vapor phase from a flowing liquid stream. Separate passages lead from the flow path and from one end of the body and in one of these is venturi means exerting an eduction influence on the other passage.

A fluid phase separator is provided which controls the mass flow rate of a fluid being expelled from a tank and insures that the fluid is in a vapor phase. A control valve is attached to the tank. Connected to the control valve is a flow tube which is sized such that the mass flow rate of the fluid passing through the tube is substantially independent of the phase of the fluid entering. The tube is designed to have flow characteristics and sufficient heat transfer area such that the fluid exitin...

An improved phase comparator for a phase-locked loop to extract the bit clock from binary data bits by detecting both the positive and negative transitions of the data bits. An equal number of the positive and negative transitions, statistically, are sampled and a transition (either positive or negative) is inhibited by cooperation of an additional bistable device controlled by a monostable device, if this transition occurs within one bit period after a previously sampled transition (either posi...