A logic circuit is connected to "n" input terminals having a descending order of priority 1, . . . k, . . . n, and to "n" corresponding output terminals for causing a logical "true" signal to be provided from any given output terminal in response to a logical "true" signal being provided at its corresponding input terminal when a logical "true" signal is not provided at any higher priority input terminal. The logic circuit includes "n" logic elements, each of which is connected between one of th...

A priority flow control system in which the priority feature is obtained by progressively lowering the pressure differential of nonpriority valves, once the maximum pump output is reached, so that all of the system valves always retain their compensated proportional flow feature.

Requests for elevator express priority service are assigned to a car committable to the floor of the request if possible, or otherwise to a car which can reach the floor of the request sooner than other available cars. Whenever there are requests for express priority service and no cars available to respond thereto, polling of floor landings in subsequent cycles to determine if there are requests which can be assigned is commenced at a floor landing next in sequence to the one for which an outst...

A priority interrupt system is disclosed comprising four registers including a push pop register. In the system, designed to accommodate up to n interrupts of different priority levels, each of the registers is of n bits, with the orders of the bits in the registers corresponding to the priority levels of the different interrupts. The highest order set bit in the push pop register indicates the priority level of the interrupt for which a sub-routine is being executed. Any lower order set bit ind...

A computer priority interrupt system minimizes the computer time required to service the request of peripheral equipment. The interrupt system is priority structured with an interrupt identifier circuit which identifies the peripheral requesting service without requiring polling of all peripheral units. Priority interlocked gates, one associated with each peripheral unit, are connected in series in the order of priority. Request signals from lower priority peripheral units are passed through the...

In a system wherein a number of processing units are connected to a single bus and wherein communication is conducted among the units on a time sharing basis, priority level discriminating apparatus is provided which includes means to detect the superposition on the bus between a bus-use request signal from another unit and a request signal from the particular unit to which the apparatus belongs, means to control the further transmission and non-transmission of the request signal in accordance w...

An improved data processing system and in particular an improved data processing system that more effectively manages a shared resource within a data processing system. More specifically, a method and apparatus for managing access to a shared resource between a plurality of devices simultaneously requesting access to the shared resource. The present invention implements a design that combines a priority configuration and a shifting sequential configuration. The access is controlled by an arbiter...

A priority encoding technique is provided which outputs a code corresponding to the highest-priority input line among input lines having a true value when true values are input to more than one of the input lines, which are prioritized and given codes. The technique includes performing higher-order-bit encoding by outputting higher-order bits corresponding to the group having its highest priority among those groups distinguished by the higher-order bits to which true values are input; and perfor...

A method and system for priority access channel allocation within a telecommunication subsystem in which channel access requests are categorized within a prioritization system that includes a first priority level, and a second priority level which is lower than in priority with respect to the first priority level. A targeted blocking rate is first assigned to the first priority level. During active operation of the telecommunication subsystem, a statistical estimation of an actual traffic intens...

A charge flow distribution valve routes all charge pump flow into a main pump until the main pump has sufficient inlet pressure. The valve opens to a first stage which routes excess charge flow to lubrication circuits. At a slightly higher main pump inlet pressure, it also routes oil to an inlet of the charge pump.