There is disclosed a technique for accessing a register file which comprises defining a first register address as a plurality of bits and using said first register address to access said register file generating a second register address by using a sequence of said plurality of bits with at least one of said plurality of bits supplied via a unitary operator, the unitary operator being effective to selectively alter the logical value of said bit depending on its logical value in the first registe...

Integrated circuitry configuration employing coplanar integrated circuit vacuum devices which are fabricated by photo-etching techniques in terms of lines on a flat substrate to form a shift register in which only active thermionic diodes, pentodes and capacitors are employed, and in which cross-overs of leads of the integrated circuitry are totally avoided.

To avoid or at least substantially reduce heat losses occurring with conventional registers ventilation, a register is disclosed which is assembled of two basic bodies supporting each a shutter and connected to each other through a thermally insulating layer. Preferably, the thermally insulating layer comprises insulating sectional strips and it is satisfactory to provide such strips only along the upper and lower longitudinal edges of the two basic bodies. The two shutters are coupled to each o...

A shift register having a plurality of flip-flop circuits connected in cascade in which a clock pulse is supplied to the flip-flop circuit at the final stage and the AND-outputs from the respective stage of flip-flop circuits are supplied to the preceding stage of flip-flop circuits as clock pulses, whereby the input data are shifted or transferred in synchronism with the clock pulse.

A shift register of the type capable of performing shift operations by changing the access of a random access memory, which is capable of performing the operations at a high speed, with respect to the address for reading data and the output of a counter, the input to which is a clock pulse. In order to increase the operations of the shift register, the operation of the address is performed in a power form or each input data is written at two different addresses of the random access memory.

A shift register that is suitable for reducing the required number of clock signals as well as simplifying the configuration of an external control circuit uses a plurality of stages connected, in series, to a start pulse input line. In each stage, an output circuit responds to a first control signal to apply any one of first and second clock signals to a row line of a liquid crystal cell array and thus to charge the low line of the liquid crystal cell array, and responds to a second control sig...

A shift register for driving a pixel array is adapted to prevent a defect due to a short of a capacitor. In each stage of the shift register, an output circuit is provided with a pull-up transistor having a first input electrode for receiving a first clock signal, a first output electrode connected to a row line and a first control electrode, and a pull-down transistor having a second input electrode connected to a low-level voltage source, a second output electrode connected to the row line and...

The input nodes and output nodes of a plurality of storing circuits for storing plural-bit data are connected to one another to constitute a shift register. Each of the plurality of storing circuits includes a selection circuit for selecting 1-bit data from the plural-bit data according to a selection signal, a first latch circuit for latching the 1-bit data selected by the selection circuit in synchronism with a first clock signal, and a number of second latch circuits, which number corresponds...

A shift register includes a plurality of alternating shifting and latching sections connected in cascade. The phases of clocks (CLK, CLKB) for driving transmission gates (10, 14) of the shifting sections advance in phase relative to the phases of clocks (CLK, CLKB1) for driving transmission gates (12, 16) of the latching sections. The ON-resistance of the transmission gates (10, 14) of the shifting sections is sufficiently larger than that of the transmission gates (12, 16) of the latching secti...

Presented is an indicating register that serves for indicating the content of magazine or the like, and having a simple and space-saving construction. Several pivotably-journaled pages each have a page appendage projecting from their pivot axis and offset relative to one another in the axial direction. A carrier unit is movable transversely to the pivot axes of the pages by means of a drive, and has several followers that are likewise axially offset to one another and additionally have a constan...