A register mark and a system for bringing a pair of register marks into alignment is disclosed. A first register mark comprises a plurality of dots of a first frequency, and a second register mark comprises a plurality of dots of a second, generally higher frequency. When the first and second register marks are overlaid, an interference pattern resulting from the difference in frequency is observed. The first and second register marks are in alignment when the interference pattern produces a max...

This electronic register operates so that when a sales item requiring input of its sub-item information is to be registered, the correct sub-item information can be inputted without fail. The number of the sub-items is in no way limited by the number of keys on the keyboard of the register. The electronic register includes a memory storing a PLU file, and information including price look up codes or PLU codes allotted to individual sales items, names of the individual items, unit prices of the i...

A meter register includes a register body having a rotatable drive shaft coupled thereto. A drive gear is attached to the drive shaft and at least one follower gear is rotatably attached to the register body and coupled with the drive gear. An antenna is provided that includes a first electrically conductive sheet, a second electrically conductive sheet, and an axially extending leg electrically connected to the first electrically conductive sheet and the second electrically conductive sheet. A ...

A shift register with low power consumption has memory circuits 15.sub.1 -15.sub.N connected in series, gate circuits in memory circuits 15.sub.2n-1 in the odd-numbered locations become conductive when clock signal CK is high, and gate circuits in memory circuits 15.sub.2n in the even-numbered locations become conductive when clock signal CK is low, wherein data signals S input are latched for output when the gate circuits are shut off. The circuit configuration is simplified. The Shift register...

A filter register bank, for example, for a CAN module provides parallel and serial access. The filter bank comprises a plurality of memory cells arranged in a matrix of columns and rows, wherein for parallel access all memory cells within a row are selectable and coupled with a first plurality of bus lines and for serial access all memory cells within a column are selectable and coupled with a second plurality of bus lines.

A meter register includes a register body having a rotatable drive shaft coupled thereto. A drive gear is attached to the drive shaft and at least one follower gear is rotatably attached to the register body and coupled with the drive gear. An antenna is provided that includes a first electrically conductive sheet, a second electrically conductive sheet, and an axially extending leg electrically connected to the first electrically conductive sheet and the second electrically conductive sheet. A ...

A shift register includes first and second stages for sequentially outputting scan pulses to drive first and second gate lines. One of the first and second stages includes a pull-up switching device connected to an enabling node of the one of the first and second stages; a first pull-down switching device connected to a first disabling node of the one of the first and second stages; a second pull-down switching device connected to a second disabling node of the one of the first and second stages...

A shift register including a plurality of stage circuits is provided. Each of the stage circuits has a shift circuit for receiving an input signal and providing an output signal. The output signal is obtained through the logic calculation and delaying of the input signal. Each of the stage circuits, except the first one, further includes a logic circuit used to produce at least one control signal according to the internal signals of the containing stage circuit, so as to replace at least one of ...

Data is read out of magnetic cores and stored in a readout register having a plurality of bit storage stages, each stage including a two-transistor latch circuit and a plurality of output transistors connected to the output of the latch. A strobe pulse applies the core data to the latch circuit and at the same time isolates the output transistors from the latch to prevent the switching of the former during the strobe period.

A floor register wherein the blades are formed of a relatively strong material such as steel, thereby enabling the register to support considerable weight, and wherein each blade has a covering or sheath of a material of lesser strength, such as, for example, aluminum, which may be decorative and thereby enhance the appearance of the register.