A register to be mounted in a vent opening of a wall, floor, or ceiling for regulating the passage of air. The register includes a grill having a plate with grill openings for directing the passage of air therethrough, a frame connected to the bottom of the grill, at least one damper for regulating air flow through the register, a pivotal connection connecting the damper to the frame to allow pivotal movement therebetween, and a control mechanism for moving the damper between an open position pe...

A shift register includes a signal generating circuit for generating an output signal at an output end of the shift register in response to a clock signal while the signal generating circuit is turned on, a driving circuit electrically coupled to the signal generating circuit for controlling the signal generating circuit in response to an input signal received from an input end of the shift register, a primary reset circuit electrically coupled to the signal generating circuit for turning off th...

A shift register includes multiple stages connected with each other in succession. The shift register stores the threshold voltage of an amorphous silicon thin-film transistor in a capacitor. During operation, the bias applied to the transistor is adjusted according to the threshold voltage stored in the capacitor.

A register file is often used within integrated circuitry to temporarily hold data. Sometimes this data needs to be retained within the register file for a period of time, such as when there is a stall operation. Conventional register files have utilized a hold multiplexor to perform such a stall operation. The multiplexor however inserts a delay that is undesirable in high performance integrated circuitry. The multiplexor is replaced with a tri-state inverter coupled to the global bit line of t...

A register device is provided with a plurality of sub-register devices. The plurality of sub-register devices are grouped into three sub-register device groups, with a signal processing unit constituted of inverters and a capacitative element provided between adjacent sub-register device groups. A transfer signal output by a transfer signal generator is amplified at the signal processing units. This structure achieves an accurate and efficient transfer of data within the sub-register devices fro...

A register terminal is connected through a communications link to a kitchen video controller. The register terminal receives setting data for display control functions, and picture formats for the kitchen video controller display. The register terminal provides setting destination information related to the product item selected by a purchaser, and sets a display number on the kitchen video controller in response to the destination information. A customer's order is searched at the register term...

A NULL convention asynchronous register regulates wavefronts of signals through a NULL convention sequential circuit. The asynchronous register receives a control signal from a downstream circuit when the downstream circuit is ready to receive a new wavefront. Wavefronts alternate between meaningful data and NULL. The asynchronous register further generates a feedback signal to upstream circuits so that upstream circuits generate a wavefront when the sequential circuit is ready to receive the wa...

An improved ventilation register for a vehicle and the like is provided which comprises an elongated housing adapted to be mounted in a vehicle and having an inlet opening adapted to be connected to a source of air and an outlet opening adapted to distribute the air into a vehicle compartment. A grille assembly is mounted in the outlet opening of the elongated housing and comprising a grille housing having an inlet opening in register with the inlet opening of the elongated housing and an outlet...

In one embodiment, a memory circuit comprises one or more first memory cells, each of the one or more first memory cells configured to store at least one bit; one or more second memory cells, each of the one or more second memory cells configured to store at least one bit; and one or more read port circuits physically located between the first memory cells and the second memory cells. Each of the read port circuits is coupled to receive the at least one bit from each of the first memory cells an...

There is disclosed a technique for accessing a register file which comprises defining a first register address as a plurality of bits and using said first register address to access said register file generating a second register address by using a sequence of said plurality of bits with at least one of said plurality of bits supplied via a unitary operator, the unitary operator being effective to selectively alter the logical value of said bit depending on its logical value in the first registe...