This invention relates to a semiconductor structure and method and more particularly to isolated integrated circuitry and method.

A semiconductor circuit which has a first field-effect transistor of N-channel type and second and third field-effect transistors of P-channel type, each transistor having a gate, a source, a drain and a substrate, and a capacitor for storage. A series circuit is formed of the first, second and third transistors, the capacitor is connected to a connection point of the series circuit, and first and second voltage sources are connected to both ends of the series circuit. The substrates of the firs...

Aluminum of a contact for a semiconductor device is rendered solderable, or a region of the aluminum selectively is rendered solderable, by depositing from a solution of zinc oxide and a hydroxide of an alkali metal a first zinc layer, which is removed, and a second zinc layer initially having an activated surface, and then depositing a nickel layer on the activated zinc surface by reducing an acid solution of a nickel salt.

A semiconductor device is disclosed having a layer of metal clusters or semiconductor clusters acting as trap centers for electrons or holes to control the electrical properties of the device.

The specification describes a masking technique for semiconductor processing in which the usual photolithographic mask is eliminated by the use of an ion beam resist technique. The ion beam exposure is performed through a shadow mask. The mask layer comprises a dual dielectric. Preferential etching of the exposed portions of the top layer is used initially to form the pattern and the patterned top layer is used as a mask for the underlayer. This is advantageous when the preferential etch ratio b...

Method of producing semiconductor devices, comprising providing semiconductor body with a first major surface comprising mutually adjoining surface portions of substantially rectangular configuration; providing different conductivity type regions at various surface portions; providing metal electrode strips at the first major surface, the strips being substantially parallel to imaginary lines diagonally extending across respective surface portions, with strip portions interconnecting a number of...

A semiconductor assembly including a ceramic body formed to receive a semiconductor and its leads such that the body functions as an assembly fixture. The body, with the semiconductor and leads inserted therein, is positioned in a metallic cap with such assembly being retained in the cap by an encapsulating compound, or by a non-metallic cap. In another form of the invention, the assembly includes two coacting ceramic bodies secured together with a semiconductor therein. The leads may be straigh...

A semiconductor element with a semiconductor body with pn-junction at the surface. At least the pn-junction is provided with an insulating layer. The insulating coating contains bivalent lead ions, and an additive whereby an oxide coat at the surface of the semiconductor body becomes permeable to bivalent lead ions. The additive contains fluorine ions or phosphate ions.

A semiconductor device having a monocrystalline semiconductor layer provided on a surface comprising at least one region obtained by diffusion of a doping impurity whose width from the surface of the semiconductor layer in the direction of the substrate first increases and than decreases while the chemical composition of the semiconductor layer on the substrate side differs from that at the surface.

A semiconductor electrode is prepared by (a) contacting a semiconductor w a first contacting metal (capable of forming an alloy with the semiconductor), (b) contacting the first contacting metal with a ductile layer of a second contacting metal, (c) heating the resulting combination so as to form, simultaneously, a liquid phase between the semiconductor and the first contacting metal and between the first contacting metal and the ductile second contacting metal, however leaving intact a major po...