A time-shared electronic control system for use with hammer-actuated continuously rotating-type drum-printers, for selectively driving print hammers to impact intermediate recording media upon the drum. Information indicative of the position of the drum is serially compared with information available for printing during a print-cycle equivalent to the travel-time of the drum from one row of characters to an adjacent row, and upon attaining correspondence of information, emitting and storing an e...

A shared volume and tone control system for a plurality of audio amplifier stages includes a volume control potentiometer coupled between a bias potential and a resistance which is grounded. The output of the potentiometer is coupled to each amplifier stage. A resistor and diode is connected in series to the junction of the volume control potentiometer and grounded series resistance and to the output of a tone control potentiometer, which is connected by separate series resistances to the juncti...

A data processing machine capable of providing numerical control of a plurality of numerically controlled multislide machine tools or other motion machinery on a time-sharing basis operable in response to request signals associated with the machine tools from sources located either internally or externally of their control systems, on an interleaved basis. The machine completes one sequence instruction or a single sequence of a multisequence instruction at a time for each machine tool controller...

A multiprocessor computer system is disclosed in which a number of processing units, program storage units, variable storage units and input-output units are selectively combined to form one or more independent data processing systems. A maintenance and diagnostic subsystem has access to all of the critical elements of the data processing system by means of a bussing system independent of the normal data paths. The maintenance and diagnostic subsystem uses this bussing system to test and monitor...

A method for use in a multiprocessor computer system where data objects larger than the address space of a single task are mapped in main memory and the translation lookaside buffer (TLB) is maintained by user mode software is disclosed. The method uses lazy TLB updating that allows stale data to stay in the TLB until it needs to be purged.

A quiet line flip-flop is connected to a plurality of lines (12, 14) for reducing the effect of capacitive coupling between the lines (12, 14) and a line (18). A node (26) is precharged by a transistor (34) to render conductive transistors (30, 32) which connect the respective lines (12, 14) to a ground node (24). When either of the lines (12, 14) is forced to a voltage above a preset voltage the corresponding transistors (22, 28) are respectively rendered conductive to discharge the node (26) w...

A shared time-of-day (TOD) clock modification bit is used in a multiprocessing system in which the timing facilities in two or more CPUs are implemented as a function of a single TOD clock. This bit helps avoid timer errors that occur as the result of one central processing unit (CPU) changing the TOD clock value while another CPU is executing an instruction which determines a CPU timer value. Whenever the microcode in any one of the CPUs reads the TOD clock, it obtains the Shared TOD Clock Modi...

A database or some portion thereof is partitioned into ownership groups. Each ownership group is assigned one or more database servers as owners of the ownership group. The database servers that are assigned as owners of an ownership group are treated as the owners of all data items that belong to the ownership group. That is, they are allowed to directly access the data items within the ownership group, while other database servers are not allowed to directly access those data items. Accordingl...

A digital processor which may be used in a calculator or the like is provided by an MOS/LSI semiconductor chip which contains a ROM or read-only-memory for storing instructions, a bit-parallel arithmetic unit for operating on data stored in a random access memory and control circuitry for defining the operation of the system. The control circuitry includes a programmable logic array for decoding instruction words. Space on the chip is saved by a time-shared decoder which forms part of the progra...

A microprocessor system includes a microprocessor, a memory, and one or more direct memory access controllers, all connected to a common system bus which includes a system address bus and a system data bus. At least one of the direct memory access controllers is shared by a plurality of subsystem device controllers which may control peripheral devices having diverse characteristics. The microprocessor is limited in its instruction repertoire and may control peripheral devices only by means of an...