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An external dispatcher distributes prioritize tasks to a plurality of processor channels. The processor channels then contend for one of two partitions for the execution of instructions assigned thereto during a multiphase instruction cycle. Two unique processor channels, working on unrelated tasks, utilize the even and the odd partitions to execute a single instruction assigned to the respective processor channels. The instruction cycle is subdivided into phases in order to maximize the use of ...
A semaphore circuit is disclosed which employs a pair of storage elements; an arbitrator, which is driven by the storage elements; and another pair of storage elements, which are driven by the arbitrator. The arbitrator includes a first and a second NOR gate. One of the inputs of the first NOR gate is connected to the output of the second NOR gate one of the inputs of which is connected to the output of the first NOR gate.
A signal processing apparatus in which an LSI includes a memory and a plurality of blocks for making access to the memory is provided with a trace control block 170 for tracing in a specific region of the memory the history of access by a required memory access block based on a setting by a microcomputer 110 so as to allow easy analysis of the cause in the event a trouble. Also, a quasi mediation block 180 is provided in a mediation block 150, which accepts a memory use request signal from other...
A memory cell layout provides for sharing of power supply connections between adjacent rows and columns of a memory array, respectively by providing a subarray layout in which one power connection is serpentine, extending into adjacent rows, and another stitches together a connection of memory cells in adjacent columns and adjacent rows. The subarray layout may be expanded by reflection and produced by lithographic exposures of relatively large numbers of memory cells in a step-and-repeat fashio...
A computer system is described where one or more processors executing operating system (OS) code and System Management (SM) code can access the same host interface of an embedded controller. The embedded controller, in turn, is coupled to one or more system devices such as an IDE power plane switch, a thermal A/D monitor, a System Management Bus (SMBus), etc. The embedded controller asserts a system management interrupt (SMI) to the system management environment of the processing unit(s) as well...
An architecture is provided for sharing text-to-speech (TTS) resources. A TTS controller manages the allocation of the TTS resources. An application provides a conversion request which is provided to a first queue. An available TTS resource begins a conversion upon sentence boundaries and converts a predetermined minimum amount of text. Once a sufficient amount of text is converted, the digitized speech data is played to a user. The amount of converted data is monitored during the playback opera...
A data communicating device, having a number of inputs whereat data is received for communication from one of a number of outputs of the device, includes apparatus for providing two levels of arbitration to select one of the inputs for data communication to an output. The first (lower) level of arbitration bases selection upon a round-robin order; the second (higher) arbitration level selects inputs based upon an indication from an input of an undue wait for access to the output over a period of...
A parallel processing system in which access contention of a read cycle from a processing unit side to a local shared memory and a write cycle from a shared bus system side on the local shared memory is reduced and a memory LSI which may be used in such unit are provided. The parallel processing system comprises the local shared memory between the processor and a shared bus. Address and data input means (WA and DI) for writing data to a memory cell and address input means (RA) and data output me...
In a computer network system, the caches at individual stations are available to other stations. A central cache directory is maintained at a network server. Each time a station caches a data object received from a remote network, it informs the central cache directory. When a station comes online, it is asked to send a list of the contents of its cache. Whenever a station seeks an object from the remote network, the local network server first checks the central directory cache to see if the req...
The invention is a method for promoting reading in a novice reader and a book to be used in the method. The book includes a story with two texts, one written at a reading level appropriate for a skilled reader and the other written at a lower reading level appropriate for the novice reader. The texts are arranged in alternating sections and each section forms a piece of the story and supplements the preceding section. In the method, the skilled reader and novice reader take turns reading aloud f...
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