With OFDM systems the frequency domain data is the Fourier transform of the received time domain OFDM frames. The time domain frames must be sampled, at the receiver, in synchronism with the transmitter, so that each received frame contains data from only a single transmitted frame. It is vital for this synchronism to be maintained in order to maintain the orthogonality of the frames. A typical multi-carrier system, of the OFDM type, which uses a cyclic prefix permits orthogonality to be maintai...

A first (receiver), for example, pseudo random binary sequence (PRBS) generator (6) is synchronized with a second identical PRBS generator (2) at a tramsitter by adding a PRBS (u(x)) to a data stream (w(x)). The data stream includes a known value at periodic intervals. The received data is framed (5) and thus the position of the known data values determined. The received data is sampled at these positions to produce a sequence of samples (s(x)) comprising a sampled version of the transmitter PRB...

Apparatus for producing an oscillating signal in a predetermined phase relationship with an input signal which generates its output signal by mixing in variable proportions two or more reference oscillating signals. Preferably the reference signals should be in quadrature relationship and have approximately the same frequency as the desired output, but this is not essential. The output signal may be desired to be in phase with the input signal or to have a predetermined phase offset. In a furthe...

In order to allow files structures at different locations to be synchronized, a folder tree descriptive of each set of folders is created and stored at a plurality of locations. On subsequent interconnection of the two locations a new tree is created for each location and the earliest of the old trees is used to determine which files, folders or paths of the two locations have been amended. This enables deletion or re-synchronization of files between the two locations even though files may have ...

A data stream has frames of fixed, or variable but determined, length and includes a fixed length header at a predetermined position in the frame, which header has a linear systematic code structure including information digits and check digits. The check digits are employed for frame synchronization detection, as well as error detection and correction, using, for example, a modified CRC (cyclic redundancy check) decoder.

Apparatus for detecting synchronisation data in an input serial-bit digital signal formed of a series of word blocks each including a predetermined serial group of m bits forming said synchronisation data, comprises a deserialiser for deserialising the input signal to parallel-bit p-bit words where p<m, a delay for delaying at least p-1 bits of each p-bit word by one p-bit word period, and logic for receiving successive groups of 2p-1 bits each formed of a said p-bit word and the adjacent p-1...

A receiver is synchronised to a signal by studying which among the previously calculated responses to known synchronisation errors corresponds to the response of a real, received signal. A sample sequence decimated from an oversampled signal is compared to model sequences which correspond to decimation at a different distance from the optimum decimation point, and in further processing the employed decimation point is used according to how far from optimum the best correlated model sequence is s...

In a data network comprising multiplexers (M/X(A) etc) connected together by data links (1,2,3), and having clock sources (MC(1) etc), each multiplexer is provided with a clock selector (CS(A) etc). Each clock selector monitors test signals to establish status of incoming clock signals, and selects one clock signal in predetermined hierarchical order to supply to its associated multiplexer. Alternatively, e.g. in the absence of all test signals, the clock selector sets its associated multiplexer...

A plurality of slave clocks are controlled and synchronised from a central station which transmits to each slave clock frequent coded signals each of which conveys in coded form complete information as to the time, and possibly also the date, to be displayed by each slave clock.

A vertical synchronization signal detector for detecting a vertical synchronization signal in a composite video signal. The detector comprises an input (1) for receiving the composite video signal, a first detector (4,16,22) for detecting equalization pulses occurring in the composite video signal and for generating a first detection signal upon detection of an equalization pulse, a second detector (4,16,20) for detecting horizontal sync pulses occurring in the composite video signal and for gen...