In an improved control for a refrigerator, critical components such as fresh food and freezer compartment temperature sensors, temperature set devices and baffle are sampled to conform that each is operational. Upon diagnosis of a critical component failure or of multiple component failures, the control, using stored control parameters, operates the remaining components in a manner that will continue to preserve food.

Information is expressed in the form of pulses which are arranged in accordance with the equation: M.sub.n = xn+T wherein: n is the code number, M is the quantity of pulses per code number, T is the negative tolerance of pulse count, and x is the sum of one plus the positive tolerance and the negative tolerance of pulse count.

A digital tape handler is disclosed wherein data transfers to or from the tape are permitted to occur at below full tape speed. A first phase-locked oscillator is made to track the tape speed and controls the data transfer to the tape. A second phase-locked oscillator, which also tracks the speed of the tape, controls data transfers from the tape. A tape speed threshold circuit detects the speed of the tape and when the speed exceeds a predetermined fraction of the full tape speed turns the firs...

A system for sharing a memory in a fault-tolerant computer. The memory is under the direct control and monitoring of error detecting and error diagnostic units in the fault-tolerant computer. This computer, for example, verifies that data to and from the memory is legally encoded and verifies that words read from the memory at a desired address are, in fact, actually delivered from that desired address. The present invention provides the means for a second processor, which is independent of the ...

A memory array architecture configured in one form with multiple subarrays addressable by row lines, bank select lines and column select lines, arranged so that no two data word bit positions have a common row line also share common bank select lines. The addition of isolation between the row lines and the row bus combined with the shifting or jogging of the bank select lines in adjacent subarrays ensures that a short circuit or open circuit in a row line no longer effects multiple bits in a com...

A fault tolerance signal receiver (10) for use with differential voltage level transmission systems from which two voltage levels may be substantially simultaneously sensed to allow the two voltage levels to be decoded into digital signals. The receiver (10) includes an input unit (11) for receiving the two voltage levels and for producing outputs related to these two voltage levels, a first logic unit (12) for receiving the output from the input unit and for producing an output, with the output...

Hierarchical star or rooted tree networks have been implemented and have any desirable characteristics, including excellent performance, conceptual simplicity, and suitability for optical fiber implementations. However, they have a single point of vulnerability to catastrophic failure (the master or root hub) as well as vulnerabilities to single failures of links or hubs high in the hierarchy, which could disable large portions of the network. Redundant network components are added to eliminate ...

A semiconductor memory structure having multiple memory modules that can be assigned or reassigned to serve in different logical memory locations, to obviate fault conditions detected in one or more modules. A logical addressing scheme treats the memory as having P pages, each with N multibit memory words. The memory modules are each 1.times.N bits in size and each module provides one bit of memory at the same bit position in every word in the page. This minimizes the effect of radiation damage,...

A fault tolerant control system employing input sensing network and in association therewith a signal processing system which eliminates the effect of radiofrequency interference, electromagnetic interference, transients, and random false alarm signals. The sensing network comprises a linear circuit or a resistor disposed in parallel with one or more semiconductors which are preferably diodes or the like. The network senses current flow so as to provide a signal having a maximum voltage establis...

A network for providing data communication among a plurality of remote units and between such remote units and a central processor complex in which a plurality of node units are each associated with one or more remote units. The node units and central processor complex are interconnected by communications links, a selected number of such links being activated and each of the terminals of each node unit being assigned an appropriate status so that each node unit is in communication with the centr...