A transistor circuit is formed of at least two unit transistors. Each unit transistor includes an NPN bipolar transistor and a PN junction diode. The P region (anode) of the PN junction diode is connected to the P region (base) of the NPN transistor. The N region (cathode) of the PN junction diode is connected directly or indirectly to the N region (emitter) of the NPN transistor. One of the unit transistors is so connected to the other unit transistor as to form a Darlington circuit.

An amplifier comprising of two MOS-transistors Q.sub.1 and Q.sub.2 and a resistor R.sub.1 connected as a two-pole between a DC power source, PS.sub.1, and a load Z.sub.L ; in order to avoid harmful influences on the amplifier from the load current, and to obtain a simple control unit for this purpose: (a) the emitters (sources) of Q.sub.1 and Q.sub.2 form one pole of the two-pole, and one side of R.sub.1 is connected in series with the collector (drain) of Q.sub.1, and the other side of R.sub.1 ...

A transistor amplifier utilizing AC, for an orchestral instrument, having a non-inverting input, with a predetermined range of linear amplification, a feedback means including a first path independent of transistors for controlling the input within said predetermined range, a supplementary path parallel with said first path and including a zener diode having a breakthrough point at the upper limit of said range, and a plurality of auxiliary paths having breakthrough points higher than that of th...

A transistor amplifier comprising two transistor pairs, connected in parallel at their bases and collectors and with interconnected emitter electrodes of one transistor pair receiving an essentially constant direct current and the interconnected emitter electrodes of the other transistor pair an essentially constant direct voltage. The amplifier extends the upper range of input voltages at which the difference of the collector currents of these transistor pairs varies as a linear function of the...

A storage transistor includes a semiconductor substrate having formed therein a source region and a drain region spaced from said source region forming a channel region therebetween. A gate electrode is disposed over said channel region and a layer of storage medium has a first portion extending between the channel region and the gate electrode and a second portion extending laterally outside from between the channel region and the gate electrode, the ratio of the area of the second portion to t...

The invention is a combination of a transistor-transistor logic (TTL) gate and a multi-emitter transistor clipping circuit having a different emitter connected to each input of the gate. The multi-emitter transistor is biased so that any signal, reflected by an input of the gate and tending to pull the potential of that input below ground, causes the transistor to conduct and clip the input signal essentially at ground potential.

A power supply for producing DC voltage with a minimum voltage drop from a source voltage that is either AC or DC in which the emitter-base junction of a transistor is coupled to the source so as to provide base current required to turn the transistor on, an output capacitor is connected in series with the emitter-collector path, and a capacitor and resistor are connected in parallel in the base circuit of the transistor.

The invention relates to a power transistor with a semiconductor body. When shutting off a power transistor, local fusing of the semiconductor body may occur, if a characteristic power loss is exceeded for a certain period of time (second breakdown). This can be avoided, if the transistor includes a multiplicity of small partial transistors with very narrow emitter zones which are mutually paralleled via a ballast resistance each.

A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a s...

A TTL circuit having a pair of current sources (R2/V.sub.CC and R2/V.sub.CC) and a pair of transistors (Q1 and Q2) arranged in a standard TTL input/inverting configuration has hysteresis at the input signal (V.sub.X) for providing noise protection. A hysteresis circuit (10) suitably containing another current source (R3/V.sub.CC) coupled to the base of the inverting transistor (Q2) and a rectifier (12) coupled between the collector of the inverting transistor and the current source (R1/V.sub.CC)...