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Results for US_CLASSIFICATION: 710/105
Showing 1 – 10 of 1089
The invention relates to a channelizer or apparatus for sorting articles such as prepacked foodstuffs into channels each characterized by an individual weight band. The apparatus of the invention includes a weighting unit that weighs each article and produces information significant of the article weight that is transferred step by step through a train of preset registers storing channel weight band information until the transferred information agrees with the stored information. This agreement …
 
A plurality of devices any one of which can request service by a central controlling unit are interconnected in a loop arrangement by an enabling line. The controlling unit is effectively coupled in parallel to all the devices so that the presence of a service request by one of them will immediately initiate operations that will result in one of the devices being granted service. Each device includes logic circuitry to force it to actuate its leg of the enabling line loop if it was the device gr…
 
A loop system couples a CPU channel to bulk storage devices via a loop controller and device adapter. The loop system is characterized by equal fixed-length, multi-byte frames, each frame of which being assignable to only one terminal at a time. The system is further characterized by having a fixed loop delay greatly exceeding the frame duration by virtue of the high data rate. Dynamically variable frame assignment occurs when the primary terminal generates an unassigned empty frame in response …
 
A data processing system includes a plurality of data handling subsystems which communicate with each other by means of an interval transfer bus. The subsystems are located at ports along the bus and each is provided with a local bus adapter interconnecting the subsystem with the bus. Busy lines are provided, one for each port on the bus, and all such busy lines are connected to all of the ports for use by any such port when the latter is acting as a source. Each busy line is uniquely connected …
 
An interface circuit for use in a data transmission system has a first port for connection to a 16 wire data highway of the type proposed by the I.E.C. (International Electrochemical Commission) for the interconnection of instruments, and a second port capable of being connected to an eight-wire or two-wire data link. The interface circuit includes an encoding circuit operative to encode at least some commands applied to the first port, and an enabling circuit for selectively enabling data appli…
 
A system by which a number of central processing units (CPU’s) may be used completely independently of one another, and yet by which any CPU within the system may communicate with any other CPU in the system. The implementation of the system requires each CPU to be physically connected only to its own bus and to the bus of one other CPU even if there are many CPU’s and buses in the system. This enables each CPU in the system to have access to all of the buses of all of the other CPU’s in the sys…
 
A network consists of a programmable controller coupled to several sensors by an interface circuit. A common communication protocol is used to exchange messages containing commands and data between the devices coupled to the network. A protocol message packet has a header with fields for a task command, sensor identification, device status information and error codes. The header contains the same fields whether the message packet is for the interface circuit or one of the sensors connected to it…
 
An input/output bus for a data processing system which has extended addressing capabilities and a variable length handshake which accommodates the difference delays associated with various sets of logic and a two part address field which allows a bus unit and channel to be identified. The various units can disconnect from the bus during internal processing to free the bus for other activity. The unit removes the busy signal prior to dropping the data lines to allow a bus arbitration sequence to …
 
The present invention relates to a system for controlling multiple communications lines, so that a computer system can operate with a single component failure. Two processors are used to control two communications controllers and each of the controllers control up to 15 line controllers. Each line controller has two ports and each port is connected to a communications controller thereby providing two communications paths to each processor. Two power supplies are also used to provide single failu…
 
A computer system comprises a bus for data, address and control signals which is divided into a left bus and a right bus by a first gating device. The gating device has an open state which is character-wise activated by a right bus request transported on the left bus. Furthermore, the gating device conducts start signals from a processor station connected to the left bus and interrupt signals from a peripheral apparatus connected to the right bus. In the closed state of the gating device, bulk d…
 
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