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Results for INVENTOR: hembree david r. AND FULL_TEXT: {hembree david r. boise id}
Showing 1 – 10 of 291
An apparatus, and method of using the apparatus for forming multiple bends in the lead wires of a multiple lead integrated circuit package. The apparatus comprises cooperating first form punches which provide a first bend in the lead wires, and a plurality of second form punches and anvils to provide a second bend in the lead wires. The lead wires are held by a clamp mechanism during the bending process so as to prevent damage to the package. The integrated circuit package is provided in a lead …
 
The present invention includes an electronic device workpiece processing apparatus and method of communicating signals within an electronic device workpiece processing apparatus. One embodiment of an electronic device workpiece processing apparatus includes a chuck including a surface, an electrical coupling adjacent the surface, and electrical interconnect configured to connect with the electrical coupling of the chuck and conduct a signal within the chuck; an intermediate member having a first…
 
A contactor card assembly for use with a semiconductor substrate. An upper keeper plate and a lower keeper plate each include a number of conductive pins extending therethrough, situated in vias filled with an elastomeric material and extending beyond the keeper plates to contact a substrate for testing. An intermediate keeper plate is situated between the upper and lower keeper plates and includes conductive pivot bars in channels filled with elastomeric material. Each conductive pin contacts a…
 
A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back sid…
 
A method for filling a via formed through a silicon wafer is disclosed. The method entails mounting the silicon wafer on a mounting substrate and depositing either molten or solid balls of a conductive material into the via. The deposited conductive material may be reflowed to provide electrical contact with other components on the surface of wafer.
 
A method for testing a semiconductor component having contact balls includes the step of providing a test socket having contacts in electrical communication with a test circuitry. The method also includes the step of providing an interposer on the test socket having interconnect contacts configured to electrically engage the contact balls. In addition, the method includes the steps of aligning and forming electrical connections between the interconnect contacts and the contact balls on the compo…
 
A process for forming a thermally enhanced Chip On Board semiconductor device with a heat sink is described. In one aspect, a thermally conducting filled gel elastomer material or a silicon elastomeric material or elastomeric material, if the material is to be removed, is applied to the die surface to which the heat sink is to be bonded. During the subsequent glob top application and curing steps, difficult-to-remove glob top material which otherwise may be misapplied to the die surface adheres …
 
A method and apparatus for aligning and connecting objects, such as semiconductor components and substrates, are provided. The apparatus includes a hexapod with a moving platform for holding an object for movement in six degrees of freedom. The apparatus also includes a chuck assembly for holding a mating object in a stationary position. A camera and a height gauge are mounted on the moving platform to allow determination of the position and orientation of the object on the chuck assembly. Likew…
 
Apparatus and methods for substantial planarization of solder bumps. In one embodiment, an apparatus includes a planarization member engageable with at least some of the plurality of outer surfaces to apply a planarization action on one or more of the outer surfaces to substantially planarize the plurality of outer surfaces, and a securing element to securely position the bumped device during engagement with the planarization member. Through application of “additive” and/or “subtractive” process…
 
Apparatus and methods for substantial planarization of solder bumps. In one embodiment, an apparatus includes a planarization member engageable with at least some of the plurality of outer surfaces to apply a planarization action on one or more of the outer surfaces to substantially planarize the plurality of outer surfaces, and a securing element to securely position the bumped device during engagement with the planarization member. Through application of “additive” and/or “subtractive” process…
 
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